andreamerello
commented
4 years ago PWM
Available device and outputs
Available PWM outputs:
-
TIM1 (ch1) - 16 bit counter
-
TIM2 (ch1) - 32 bit counter
-
TIM3 (ch1) - 16 bit counter
-
TIM12 (ch1, ch2) - 16 bit counter - But CH2 conflicts with SPI!
-
TIM5 (ch4) - 16 bit counter
TIM12 is the only timer for which more than one channel is available. No complementary PWM outputs are available on remaining channels.
[2]
Settings
CubeMX settings from the Discovery board demo project are almost OK
Global settings:
-
Prescaler: depending by incoming clock and desired PWM frequency (coarse)
-
TIMx_ARR (cubemx counter period): fine tune desired PWM frequency, keep high to maximize PWM resolution
-
Repetition count: set to zero. It serve for generating less update events when PWM is running. In our case we don't explicitly need the update event. The update event is used internally to trigger preload (see channel configuration).
"To make the timer channel to output repetitive pulses with the same t_on and t_off parameters and without the timer generating an “update event” on each PWM cycle, the timer repetition counter should be used." [1]
"As soon as an “update event” is generated within the timer peripheral, the content of the preload register instance is transferred to the active register instance immediately." [1]
-
Preload(cubemx auto-reload preload): Disabled - This affects TIMx_ARR, no channels CCR regs,
Channel settings:
-
PWM Mode: TODO
-
CH polarity, CH idle state: depending by application
-
Output compare preload: Enabled - this refers to the channel (i.e. TIMx_CCMR1 reg, OC1PE).
"The preload feature can be of big interest when outputting a PWM signal on a certain timer channel. [..] writing directly to the channel register in the middle of a PWM period may generate spurious waveforms. To overcome this problem, the preload feature should be enabled for the concerned timer channel register." [1]
-
Pulse: Disabled (if enabled PWM Disables after 1st cycle)
-
Fast mode: N.U. Relevant only for input trigger.
Trigger output and dead time settings: all disabled
PWM generation
TIMx_CCR1 reg regulates PWM duty i.e. it contains the duration of the ON period
TODO: HAL API
Sample CubeMX code snippet
The Following code in an extract from CubeMX TIM1 configuration
htim1.Instance = TIM1;
htim1.Init.Prescaler = 0;
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
htim1.Init.Period = 60000;
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim1.Init.RepetitionCounter = 0;
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
HAL_TIM_MspPostInit(&htim1);
}
References
[1] ST AN4776
[2] ST UM1907
maggia80
mircodisalvo
pattacini
marcoaccame
In this issue we are going to publishing some misc notes we wrote in EDL regarding firmware design and implementation proposal. They include architectural aspects and notes about HW configuration.
They are still draft, but we would like to start sharing something; they are about the low level part (sensor reading/pwm generation).