Decide the control output for controlling the proportional valves

[simeonedussoni]

we have a few alternatives to control the CP/AP valves in the input stage (proportional mode)

• the valve controller accepts or 0-10V or 4-20mA control signals
• if we use the voltage control we can:
  • take the value from a DAC output routed to Pin 17 of DCMI connector in the Nucleo as described in this comment
  • amplify it to reach the 0-10V range with an external amplifier
  • in alternative we can attach an external DAC but with the same need for a step up amplifier (e.g. Quad DAC 12 bit I2C)
• if we use the current control we can:
  1. attach an external PWM to current converter available also in pre-mounted boards
  2. attach an external SPI 4-20mA MIKROE-1296 current loop transmitter
  3. attach an external I2C 4-20mA current loop transmitter

let's decide pros and cons of these and other alternatives

[claudiolorini]

...for [0..10]V input, another possibility is to use a PWM output (12V) and LPF to filter out high freq. components. Can someone give a target of the BW of the signal needed for driving the valve?

[pattacini]

@claudiolorini the following graphs may be helpful.

Here's the temporal profile of the Duty Cycle reference command:

Here's its FFT:

Keep in mind that the controller runs at 100 Hz.

[claudiolorini]

Grazie, Ugo, for what i can see the control signal has very low spectral contents, that's good. Is it possible to have the second graph in logaritmic units, just to have an idea of the required resolution of the DAC?

[pattacini]

[MarcoCrepaldi-iit]

Hi Ugo, there is something that is not clear to us. The provided dc-f is an FFT of the time signal dc-t. However, we cannot see the very steep edges occurring at t = 1s and t = 2.45s. Did you plot only what isnside this [1, 2.5]s interval? Could you please add a log_f plot until f = 10kHz? The edge of the duty cycle signal is very important to understand if duing the start-up the system settles correctly. Does the edge really matter? It does impact on the system bandwidth...

Because if we need to generate a PWM signal that goes from 0 to 100% in 1ns and then it has a limited bandwidth we need to consider more or less 1GHz bandwidth instead of 100Hz...

[MarcoCrepaldi-iit]

Also Ugo, could you please simulate the circuit using a limited slew rate for the duty cycle edge let's say 10ms, i.e., 1/100Hz?

[pattacini]

I've looked more carefully at the data I used and I realized that the sample time was incorrectly varying. Thus, I made sure that the sample rate of the logged data is now fixed at 100 Hz.

Here's the new FFT of the reference duty cycle we wanna use to command the valve, which extends up to 10 Hz this time.

The temporal signal contains the starting and stopping steps, as you can see from the file. To compute the FFT, I relied on this MATLAB command.

That being said, I assumed that a PWM modulated waveform could be digitally switched from 0% to 100% in one clock of the PWM. Thereby, if the PWM is at 40 kHz, one tick means 25 us.

On the other hand, if we would need to provide an analogic control signal, switching from 0% to 100% in 10 ms − as you're requesting @MarcoCrepaldi-iit − shouldn't be problematic since 10 ms corresponds to one clock of the controller running at 100 Hz. We will basically introduce a delay of just one sample.

Anyway, this is what I got. Please, add up further info and correct any possible wrong understanding.

[claudiolorini]

We can use the 0..10V input of the Camozzi SERIE 130, With a 3.3V PWM @100KHz followed by an active 2nd order LPF cut freq=100Hz and Gain=3, we should be able to reach an DAC equivalent resolution around 10bit. If a greater resolution will be needed, we can reduce the PWM freq. For example with 10KHz we can reach an equivalent resolution of 13..14 bit, it's matter of balancing the tradeoff betwin PWM and LPF.

Of course the sharp edges of the first graph will be like a slope transient that will last around 10mesc and with a small overshoot due to the LPF charachteristics:

[simeonedussoni]

@claudiolorini this plot is the response to the input step with initial duty cycle of 100%?

[claudiolorini]

yes, step response of the filter.

[simeonedussoni]

with this circuit we can reach 10V to eventually perform full duty cycle? this is an important issue since we have NC valves

[claudiolorini]

sure, with the mentioned slope (a delay in the control signal of around 10ms). Adjusting the gain of the LPF we can also change the full scale voltage of the control signal, for example to 10.5 or 9V if the need arises.

[maggia80]

The Camozzi serie130 EVO that Camozzi will provide us has an 0-5V DC input signal.

[claudiolorini]

ok, so the LPF gain can be set to around 1.5 (i would probably put a trimmer to fine tune the gain)

[claudiolorini]

Seems that the control signal is adequate to the needs... what about closing down?

[pattacini]

[pattacini]

Just as a final comment, from the visual inspection of preliminary tests in PRVC mode, the CP valve seems reacting very fast and the pressure step as sensed by S1 is being perfectly tracked 🚀