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ignperez-udec / MobileNet-V2-inference-HLS

Codes to implement MobileNet V2 in a FPGA
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HI，sir！How can I reproduce this project on another development board #1

Open BCNK opened 2 years ago

BCNK commented 2 years ago

Can you provide a tutorial on how to use the project

ZeLongXiang commented 2 years ago

Is there any blog or article about the optimization strategy used in your code

ignperez-udec commented 2 years ago

Hi, the architecture designed in HLS and Verilog can be used in other FPGAs, you just have to change the configuration in the project and be careful with the use of resources. We publish an article with more information and strategies used in archiecture. The DOI is https://doi.org/10.3390/s21082637.

ns1j commented 1 year ago

Hello, did you upload the constraint file of vivado in the project you uploaded?

ignperez-udec commented 11 months ago

Hello, I don't have constraint files because this is an IP + CPU project (I used an Ultrascale FPGA), so, the constraints files are generated automatically. If you want to use these codes, you must create a new project with the HLS code and make the connections as shown in the xsa file in the Harware/Vivado folder.