Is BGACKn behavior correct?

[tcdev42]

More a question than a verified bug...

I inadvertently left BGACKn input unassigned (0) (BRn=1'b1) and the processor wouldn't start out of reset because the busArbiter dmaPhase transitioned to dBA and spun there.

Is that how a real 68000 would behave, given there was no prior bus request or bus granted?

[jotego]

I think the IO in this module follows the original microcode, so I would answer yes. Many processors won't boot up for certain pin configurations, so this behavior isn't strange either.

[sorgelig]

On a real 68000 floating pin usually gets logic 1 (through inner pull-up or leakage). In verilog unassigned pins get 0. So need to pay attention to this.

[ijor]

Yes, that is the correct behavior. As a matter of fact, it is documented in Motorola User’s Manual.

If BGACK is asserted when the Bus Arbitration state machine is in the idle state, BG would not be asserted but the bus will not be available internally. The CPU will not start any new bus cycle while in this state.

[tcdev42]

OK cool, thanks for verifying!