Closed noelpedro closed 4 years ago
Hi guys I'm trying to use udmabuf on a simple loopback design here is my device tree that I plan to use:
Do I need to define memory region of udmabuf nodes for RX and TX dma channels?
I dont understand how the uio device would do the DMA trasanctions and how udmabuf will help?
Does my device tree make sense at all? `
/ { /* Loopback DMA setup */ loopback_dma: axidma@40400000 { compatible = "generic-uio"; #dma-cells = <1>; reg = < 0x40400000 0x10000 >; clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>, <&clkc 15>; // fclk0 from clock controller clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk", "m_axi_sg_aclk"; xlnx,include-sg; loopback_dma_mm2s_chan: dma-channel@40400000 { compatible = "xlnx,axi-dma-mm2s-channel"; interrupt-parent = <&intc>; interrupts = <0 31 4>; xlnx,datawidth = <0x20>; xlnx,sg-length-width = <14>; xlnx,device-id = <0x1>; }; loopback_dma_s2mm_chan: dma-channel@40400030 { compatible = "xlnx,axi-dma-s2mm-channel"; interrupt-parent = <&intc>; interrupts = <0 32 4>; xlnx,datawidth = <0x20>; xlnx,sg-length-width = <14>; xlnx,device-id = <0x1>; }; }; udmabuf@0x00 { compatible = "ikwzm,udmabuf-0.10.a"; device-name = "udmabuf0"; minor-number = <0>; size = <0x00100000>; sync-direction = <1>; //TX }; udmabuf@0x01 { compatible = "ikwzm,udmabuf-0.10.a"; device-name = "udmabuf1"; minor-number = <0>; size = <0x00100000>; sync-direction = <2>; //RX }; }; `
Thaks for your time, :100:
Thank you for the issue.
I don't know what you want to know. However, a reference project for loopback dma was released at the following URL. please refer.
https://github.com/ikwzm/FPGA-SoC-Linux-Example-2-ZYBO-Z7
Hi guys I'm trying to use udmabuf on a simple loopback design here is my device tree that I plan to use:
Do I need to define memory region of udmabuf nodes for RX and TX dma channels?
I dont understand how the uio device would do the DMA trasanctions and how udmabuf will help?
Does my device tree make sense at all? `
Thaks for your time, :100: