Closed Noah-naihe closed 1 year ago
Thanks for the issue.
DMA transfers using ACP/HCP are hardware consistent in the CPU cache. If cache consistency is maintained in hardware, the dma-coherent property of u-dma-buf should be set to <1>. u-dma-buf will not manipulate the cache by software when sync_for_cpu/sync_for_device runs if dma-coherent is set to <1>. This makes it slightly faster.
Thank you for your reply:
Then I can use the hardware consistency feature of zcu102 with confidence
I used the board end of zcu102, and udmabuf0 and udmabuf1 opened up 800MB and 800MB respectively. The data of udmabuf0 was tested to write data to the external hard disk, but the speed was only 120MB/s if CPU cache was not enabled. With CPU cache turned on, it is over 400MB/s and my target is 400MB/s. However, I checked that the zcu102 architecture includes acp, but it is also dma-coherent and 0. I read your previous document that it is configured in the device tree. But I am not sure whether the zcu102 can achieve hardware consistency?![image](https://user-images.githubusercontent.com/81860689/197092186-8d631a69-0b69-49b3-80ad-e6b15587ebbe.png)