BrendanSimon
commented
5 years ago The following might be a fix ?
static void stm32f4_gpio_bsrr_post_write_callback(Object *reg, Object *periph,
uint32_t addr, uint32_t offset, unsigned size,
peripheral_register_t value, peripheral_register_t full_value)
{
STM32GPIOState *state = STM32_GPIO_STATE(periph);
Object *odr = state->reg.odr;
assert(odr);
// 'value' may be have any size, use full_word.
uint32_t bits_to_set = (full_value & 0x0000FFFF);
uint32_t bits_to_reset = ((full_value >> 16) & 0x0000FFFF);
// Clear the BR bits and set the BS bits.
uint32_t new_value = (peripheral_register_get_raw_value(odr)
& (~bits_to_reset)) | bits_to_set;
stm32_gpio_update_odr_and_idr(state, odr, state->reg.idr, new_value);
#if 1 //FIXME:BJS: clear BR and BS bits in the BSRR register after ODR is set
peripheral_register_write_value( state-reg.>bsrr, 0 );
#endif
}
Guess you would have to do a similar thing for all the families (F0, F1, etc).
Might be possible to consolidate that in one place and clear the brr register as well, to cover all families ?
static void stm32_gpio_update_odr_and_idr(STM32GPIOState *state, Object *odr,
Object *idr, uint16_t new_value)
{
assert(odr);
// Preserve old value, to compute changed bits
uint16_t old_value = peripheral_register_get_raw_value(odr);
// Update register value. Per documentation, the upper 16 bits
// always read as 0, so write is used, to apply the mask.
peripheral_register_write_value(odr, new_value);
#if 1 //FIXME:BJS: clear BSRR and BRR registers after ODR is set
peripheral_register_write_value( state->reg.bsrr, 0 );
peripheral_register_write_value( state->reg.brr, 0 );
#endif
stm32_gpio_set_odr_irqs(state, old_value, new_value);
stm32_gpio_update_idr(state, idr, new_value);
} I think peripheral_register_write_value() would work ok. It only sets the state value of a register object.
An alternative is to use peripheral_register_set_raw_value() which does the exact same thing, but without masking out non-writable bits. It's a little more efficient and probably ok to use for this use case (i.e. clearing BSRR register after the bits have been finished with).
ilg-ul
Description
I have a function that sets a pin state to high or low, and code that calls that function to set the red LED on the STM32F4 Discovery board to high and low (it pulses).
The code works on a real Disco board, but in QEMU the LED turns on, but never turns off.
The codes uses the
BSRRHregister to set the pin low, and uses theBSRRLregister to set the pin high.These are 16-bit registers. Not the 32-bit BSRR register which combines BSRRH and BSRRL as a 32-bit register.
See the forum discussion here:
Example functions are:
Steps to Reproduce
turnOn()andturnOff()methods inBlinkLed.cppwith the following.Note: might need to define the
BSRRLandBSRRHmacros? I'm using the older STD_PERHIPHERAL library, which has these defined instead ofBSRR. Seems the blinky codes uses STM32F4 HAL with CMSIS v2.5.0 (April 2016) and I'm using CMSIS v1.0.0 (September 2011).Either way, QEMU should do the "right thing (TM)" (assuming "the right thing" is what the Disco board does).
Expected behaviour:
Red link to turn on when setting bit with BSRRL and to turn off when setting bit with BSRRH.
Actual behaviour:
Red LED turns on, but never turns off.
Versions