imxrt-rs / imxrt-hal

Rust for NXP i.MX RT
Apache License 2.0
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Block at end of LPI2C embedded-hal transactions #165

Closed mciantyre closed 2 months ago

mciantyre commented 3 months ago

Wait for the controller to become idle before returning to the transaction caller. This is a stronger guarantee than waiting until the stop bit is sent, and it meets the EH1 interface requirements.

This commit still keeps the busy check at the start of the transactions. If the bus is busy due to another controller's activity, I don't think we should block the caller while the other controller uses the bus. The caller can implement a retry policy given the characteristics of their system. EH1 lets users handle this condition with a dedicated error kind.

Additionally, this commit keeps the FIFO flushes at the start of transactions, after the busy checks. This is intended to avoid surprises in case a user inserts a high-level transaction somewhere in their low-level command sequence.

I updated one of the I2C examples to blast a device through the eh02 interfaces. It behaved reasonably on a Teensy 4 setup.