integralfx
commented
3 years ago Since the primary timings have the highest impact on performance,
That's not actually the case. Secondary timings impact performance more as you can see here linked in the benchmarks section.
You should also notice that as you tighten secondaries, specifically tRRDS/L, tFAW and tWR, memory tests will run a lot quicker. Since most of the time is spent testing, it's best to speed that up as much as possible.
This may well be a false assumption but, isn't there a chance that when one of the secondaries gets tighter, one or more of the primaries becomes harder (e.g. requiring more voltage or less frequency) or outright impossible to tighten further?
Doesn't work like that. Most timings aren't a zero sum game where you have to loosen one timing to tighten another. You might get a false impression of that being the case, but most of the time it's just an IMC limitation.
aps-kar
aaslam-collab
Hello, first of all thanks for the awesome writeup, I'm hoping this question reaches one of the contributors.
In the tightening timings section, the following is written:
As a beginner in memory overclocking, this confuses me a bit. Since the primary timings have the highest impact on performance, wouldn't it be more efficient to tighten those first? This may well be a false assumption but, isn't there a chance that when one of the secondaries gets tighter, one or more of the primaries becomes harder (e.g. requiring more voltage or less frequency) or outright impossible to tighten further?
Thanks in advance for any insight on this matter.