Closed dchigarev closed 5 days ago
The pipeline is supposed to be like this:
func.func(iterative-tiling-and-fusion) // tile linalg ops (pass from GC) one-shot-bufferize func.func(scf-forall-to-parallel) // convert tiled for-loops into parallel loops (upstreamed) func.func(linalg-to-xegpu) // (pass from tpp) // map kernel to GPU func.func(gpu-map-parallel-loops) func.func(convert-parallel-loops-to-gpu) gpu-kernel-outlining set-spirv-capabilities{client-api=opencl} gpu.module(set-spirv-abi-attrs{client-api=opencl}) gpu.module(convert-xegpu-to-vc) // (pass from imex) imex-convert-gpu-to-spirv serialize-spirv ...
Steps to achieve this:
linalg-to-xegpu
tile-consumer-and-fuse-producers
WIP 09/03 to be fixed in iteration 5
The pipeline is supposed to be like this:
Steps to achieve this:
linalg-to-xegpu
pass from TPP is incompatible with the patches made to XeGPU dialect by IMEX. We need to fix this #201BringDecided to use tiling pass from GC #87tile-consumer-and-fuse-producers
from TPP to GC #0