search

intel / intel-cmt-cat

User space software for Intel(R) Resource Director Technology
http://www.intel.com/content/www/us/en/architecture-and-technology/resource-director-technology.html
Other
693 stars 183 forks source link

Can Xeon Gold 5120 (Xeon Scalable Processors) support L2 CAT or L2 CDP? #145

Closed pangpu closed 4 years ago

pangpu commented 4 years ago

Hi, I am trying to use rdtset to partition L2 cache on my Xeon Gold 5120.

In the README of rdtset, there is an example likes that:

-t 'l2=0x1;l3=0xf;cpu=1' -t 'l2=0x1;cpu=2' CPU 1 uses one L2 (mask 0x1) and four L3 (mask 0xf) cache-ways CPU 2 uses one L2 (mask 0x1) and default number of L3 cache-ways L2 cache-ways used by CPU 1 and 2 are overlapping

But when I try this example on my CPU it tells me "CPUID 0x10.0: L2 CAT not supported!"

I wonder if my CPU supports L2 CAT, or is there any Xeon CPU can support L2 CAT?

kmabbasi commented 4 years ago

Hi Pangpu,

You can find what features are supported by which platform on our README https://github.com/intel/intel-cmt-cat/blob/master/README#L114

Thanks, Khawar

kmabbasi commented 4 years ago

Hi Pangpu,

We hop that you got answer of your question. For now I am going to close it.

If you have more questions feel free to open new issue.

Thanks, Khawar