kmabbasi
commented
4 years ago Hi Liubo,
Sorry for being a late response.
It looks your system is not recognizing resctrl. Could you please try this link to ensure resctrl is mounted https://github.com/intel/intel-cmt-cat/issues/108?
If still the problem persists, please send us the output of following along with which platform you are using:
sudo pqos -I -D
sudo pqos -I -sV
cat /usr/src/linux-headers-4.19.24/.config
Thanks, Khawar
Hi, Can you please help me with this error: I've read the other two questions（https://github.com/intel/intel-cmt-cat/issues/152 https://github.com/intel/intel-cmt-cat/issues/104），but have not solved my problem.
[root@localhost]# pqos -I -p all:31208 NOTE: Mixed use of MSR and kernel interfaces to manage CAT or CMT & MBM may lead to unexpected behavior. ERROR: OS interface selected but not supported ERROR: os_cap_init() error 8 Error initializing PQoS library!
[root@localhost ]# cat /proc/cmdline BOOT_IMAGE=/vmlinuz-4.19.24 root=/dev/mapper/euleros-root ro crash_kexec_post_notifiers softlockup_panic=1 panic=3 reserve_kbox_mem=16M nmi_watchdog=1 console=ttyS0,115200 rd.shell=0 crashkernel=auto rd.lvm.lv=euleros/root rd.lvm.lv=euleros/swap LANG=en_US.UTF-8 rdt=cmt,mbmtotal,mbmlocal,l3cat,l3cdp,mba
the kernel version is 4.19.24 which meets the minimum kernel version. In the configuration file, the CONFIG_INTEL_RDT is set to y.
[root@localhost liubo]# pqos -V -s NOTE: Mixed use of MSR and kernel interfaces to manage CAT or CMT & MBM may lead to unexpected behavior. INFO: CACHE: type 1, level 1, max id sharing this cache 2 (1 bits) DEBUG: CACHE: not inclusive, direct mapped, 8 way(s), 64 set(s), line size 64, 1 partition(s) INFO: CACHE: type 2, level 1, max id sharing this cache 2 (1 bits) DEBUG: CACHE: not inclusive, direct mapped, 8 way(s), 64 set(s), line size 64, 1 partition(s) INFO: CACHE: type 3, level 2, max id sharing this cache 2 (1 bits) DEBUG: CACHE: not inclusive, direct mapped, 8 way(s), 512 set(s), line size 64, 1 partition(s) INFO: CACHE: type 3, level 3, max id sharing this cache 32 (5 bits) DEBUG: CACHE: inclusive, complex cache indexing, 20 way(s), 24576 set(s), line size 64, 1 partition(s) DEBUG: Detected core 0, socket 0, L2 ID 0, L3 ID 0, APICID 0 DEBUG: Detected core 1, socket 0, L2 ID 1, L3 ID 0, APICID 2 DEBUG: Detected core 2, socket 0, L2 ID 2, L3 ID 0, APICID 4 DEBUG: Detected core 3, socket 0, L2 ID 3, L3 ID 0, APICID 6 DEBUG: Detected core 4, socket 0, L2 ID 4, L3 ID 0, APICID 8 DEBUG: Detected core 5, socket 0, L2 ID 5, L3 ID 0, APICID 10 DEBUG: Detected core 6, socket 0, L2 ID 8, L3 ID 0, APICID 16 DEBUG: Detected core 7, socket 0, L2 ID 9, L3 ID 0, APICID 18 DEBUG: Detected core 8, socket 0, L2 ID 10, L3 ID 0, APICID 20 DEBUG: Detected core 9, socket 0, L2 ID 11, L3 ID 0, APICID 22 DEBUG: Detected core 10, socket 0, L2 ID 12, L3 ID 0, APICID 24 DEBUG: Detected core 11, socket 0, L2 ID 13, L3 ID 0, APICID 26 DEBUG: Detected core 12, socket 1, L2 ID 16, L3 ID 1, APICID 32 DEBUG: Detected core 13, socket 1, L2 ID 17, L3 ID 1, APICID 34 DEBUG: Detected core 14, socket 1, L2 ID 18, L3 ID 1, APICID 36 DEBUG: Detected core 15, socket 1, L2 ID 19, L3 ID 1, APICID 38 DEBUG: Detected core 16, socket 1, L2 ID 20, L3 ID 1, APICID 40 DEBUG: Detected core 17, socket 1, L2 ID 21, L3 ID 1, APICID 42 DEBUG: Detected core 18, socket 1, L2 ID 24, L3 ID 1, APICID 48 DEBUG: Detected core 19, socket 1, L2 ID 25, L3 ID 1, APICID 50 DEBUG: Detected core 20, socket 1, L2 ID 26, L3 ID 1, APICID 52 DEBUG: Detected core 21, socket 1, L2 ID 27, L3 ID 1, APICID 54 DEBUG: Detected core 22, socket 1, L2 ID 28, L3 ID 1, APICID 56 DEBUG: Detected core 23, socket 1, L2 ID 29, L3 ID 1, APICID 58 DEBUG: Detected core 24, socket 0, L2 ID 0, L3 ID 0, APICID 1 DEBUG: Detected core 25, socket 0, L2 ID 1, L3 ID 0, APICID 3 DEBUG: Detected core 26, socket 0, L2 ID 2, L3 ID 0, APICID 5 DEBUG: Detected core 27, socket 0, L2 ID 3, L3 ID 0, APICID 7 DEBUG: Detected core 28, socket 0, L2 ID 4, L3 ID 0, APICID 9 DEBUG: Detected core 29, socket 0, L2 ID 5, L3 ID 0, APICID 11 DEBUG: Detected core 30, socket 0, L2 ID 8, L3 ID 0, APICID 17 DEBUG: Detected core 31, socket 0, L2 ID 9, L3 ID 0, APICID 19 DEBUG: Detected core 32, socket 0, L2 ID 10, L3 ID 0, APICID 21 DEBUG: Detected core 33, socket 0, L2 ID 11, L3 ID 0, APICID 23 DEBUG: Detected core 34, socket 0, L2 ID 12, L3 ID 0, APICID 25 DEBUG: Detected core 35, socket 0, L2 ID 13, L3 ID 0, APICID 27 DEBUG: Detected core 36, socket 1, L2 ID 16, L3 ID 1, APICID 33 DEBUG: Detected core 37, socket 1, L2 ID 17, L3 ID 1, APICID 35 DEBUG: Detected core 38, socket 1, L2 ID 18, L3 ID 1, APICID 37 DEBUG: Detected core 39, socket 1, L2 ID 19, L3 ID 1, APICID 39 DEBUG: Detected core 40, socket 1, L2 ID 20, L3 ID 1, APICID 41 DEBUG: Detected core 41, socket 1, L2 ID 21, L3 ID 1, APICID 43 DEBUG: Detected core 42, socket 1, L2 ID 24, L3 ID 1, APICID 49 DEBUG: Detected core 43, socket 1, L2 ID 25, L3 ID 1, APICID 51 DEBUG: Detected core 44, socket 1, L2 ID 26, L3 ID 1, APICID 53 DEBUG: Detected core 45, socket 1, L2 ID 27, L3 ID 1, APICID 55 DEBUG: Detected core 46, socket 1, L2 ID 28, L3 ID 1, APICID 57 DEBUG: Detected core 47, socket 1, L2 ID 29, L3 ID 1, APICID 59 DEBUG: Adding monitoring event: resource ID 1, type 1 to table index 0 DEBUG: Adding monitoring event: resource ID 1, type 4 to table index 1 DEBUG: Adding monitoring event: resource ID 1, type 2 to table index 2 DEBUG: Adding monitoring event: resource ID 1, type 8 to table index 3 DEBUG: Adding monitoring event: resource ID 0, type 32768 to table index 4 DEBUG: Adding monitoring event: resource ID 0, type 16384 to table index 5 INFO: Monitoring capability detected INFO: CPUID.0x7.0: L3 CAT supported INFO: L3 CDP is disabled INFO: L3CA capability detected INFO: L3 CAT details: CDP support=1, CDP on=0, #COS=16, #ways=20, ways contention bit-mask 0xc0000 INFO: L3 CAT details: cache size 31457280 bytes, way size 1572864 bytes INFO: CPUID 0x10.0: L2 CAT not supported! INFO: L2CA capability not detected INFO: CPUID 0x10.0: MBA not supported! INFO: MBA capability not detected DEBUG: allocation init OK DEBUG: Max RMID per monitoring cluster is 96 INFO: Detected perf monitoring support for Retired CPU Instructions INFO: Detected perf monitoring support for Unhalted CPU Cycles INFO: Detected perf monitoring support for Instructions/Cycle INFO: Detected perf monitoring support for LLC Misses DEBUG: monitoring init OK L3CA COS definitions for Socket 0: L3CA COS0 => MASK 0xfffff L3CA COS1 => MASK 0xfffff L3CA COS2 => MASK 0xfffff L3CA COS3 => MASK 0xfffff L3CA COS4 => MASK 0xfffff L3CA COS5 => MASK 0xfffff L3CA COS6 => MASK 0xfffff L3CA COS7 => MASK 0xfffff L3CA COS8 => MASK 0xfffff L3CA COS9 => MASK 0xfffff L3CA COS10 => MASK 0xfffff L3CA COS11 => MASK 0xfffff L3CA COS12 => MASK 0xfffff L3CA COS13 => MASK 0xfffff L3CA COS14 => MASK 0xfffff L3CA COS15 => MASK 0xfffff L3CA COS definitions for Socket 1: L3CA COS0 => MASK 0xfffff L3CA COS1 => MASK 0xfffff L3CA COS2 => MASK 0xfffff L3CA COS3 => MASK 0xfffff L3CA COS4 => MASK 0xfffff L3CA COS5 => MASK 0xfffff L3CA COS6 => MASK 0xfffff L3CA COS7 => MASK 0xfffff L3CA COS8 => MASK 0xfffff L3CA COS9 => MASK 0xfffff L3CA COS10 => MASK 0xfffff L3CA COS11 => MASK 0xfffff L3CA COS12 => MASK 0xfffff L3CA COS13 => MASK 0xfffff L3CA COS14 => MASK 0xfffff L3CA COS15 => MASK 0xfffff Core information for socket 0: Core 0, L2ID 0, L3ID 0 => COS0, RMID0 Core 1, L2ID 1, L3ID 0 => COS0, RMID0 Core 2, L2ID 2, L3ID 0 => COS0, RMID0 Core 3, L2ID 3, L3ID 0 => COS0, RMID0 Core 4, L2ID 4, L3ID 0 => COS0, RMID0 Core 5, L2ID 5, L3ID 0 => COS0, RMID0 Core 6, L2ID 8, L3ID 0 => COS0, RMID0 Core 7, L2ID 9, L3ID 0 => COS0, RMID0 Core 8, L2ID 10, L3ID 0 => COS0, RMID0 Core 9, L2ID 11, L3ID 0 => COS0, RMID0 Core 10, L2ID 12, L3ID 0 => COS0, RMID0 Core 11, L2ID 13, L3ID 0 => COS0, RMID0 Core 24, L2ID 0, L3ID 0 => COS0, RMID0 Core 25, L2ID 1, L3ID 0 => COS0, RMID0 Core 26, L2ID 2, L3ID 0 => COS0, RMID0 Core 27, L2ID 3, L3ID 0 => COS0, RMID0 Core 28, L2ID 4, L3ID 0 => COS0, RMID0 Core 29, L2ID 5, L3ID 0 => COS0, RMID0 Core 30, L2ID 8, L3ID 0 => COS0, RMID0 Core 31, L2ID 9, L3ID 0 => COS0, RMID0 Core 32, L2ID 10, L3ID 0 => COS0, RMID0 Core 33, L2ID 11, L3ID 0 => COS0, RMID0 Core 34, L2ID 12, L3ID 0 => COS0, RMID0 Core 35, L2ID 13, L3ID 0 => COS0, RMID0 Core information for socket 1: Core 12, L2ID 16, L3ID 1 => COS0, RMID0 Core 13, L2ID 17, L3ID 1 => COS0, RMID0 Core 14, L2ID 18, L3ID 1 => COS0, RMID0 Core 15, L2ID 19, L3ID 1 => COS0, RMID0 Core 16, L2ID 20, L3ID 1 => COS0, RMID0 Core 17, L2ID 21, L3ID 1 => COS0, RMID0 Core 18, L2ID 24, L3ID 1 => COS0, RMID0 Core 19, L2ID 25, L3ID 1 => COS0, RMID0 Core 20, L2ID 26, L3ID 1 => COS0, RMID0 Core 21, L2ID 27, L3ID 1 => COS0, RMID0 Core 22, L2ID 28, L3ID 1 => COS0, RMID0 Core 23, L2ID 29, L3ID 1 => COS0, RMID0 Core 36, L2ID 16, L3ID 1 => COS0, RMID0 Core 37, L2ID 17, L3ID 1 => COS0, RMID0 Core 38, L2ID 18, L3ID 1 => COS0, RMID0 Core 39, L2ID 19, L3ID 1 => COS0, RMID0 Core 40, L2ID 20, L3ID 1 => COS0, RMID0 Core 41, L2ID 21, L3ID 1 => COS0, RMID0 Core 42, L2ID 24, L3ID 1 => COS0, RMID0 Core 43, L2ID 25, L3ID 1 => COS0, RMID0 Core 44, L2ID 26, L3ID 1 => COS0, RMID0 Core 45, L2ID 27, L3ID 1 => COS0, RMID0 Core 46, L2ID 28, L3ID 1 => COS0, RMID0 Core 47, L2ID 29, L3ID 1 => COS0, RMID0
Any help would be appreciated !