search

intel / intel-cmt-cat

User space software for Intel(R) Resource Director Technology
http://www.intel.com/content/www/us/en/architecture-and-technology/resource-director-technology.html
Other
693 stars 183 forks source link

What does "contention mask" really mean? #177

Closed jchia closed 3 years ago

jchia commented 3 years ago

pqos -sv reports "contention bit-mask":

...
INFO: L3 CAT details: CDP support=1, CDP on=0, #COS=16, #ways=11, ways contention bit-mask 0x600
...

rdtset warns about "contention mask", e.g.:

$ sudo rdtset -r 0 -t 'l3=0x7f;cpu=2,4,6,8,10' -t 'l3=0x780;cpu=0,12,14' -c 2 sleep 1000
CAT: One or more of requested L3 CBMs (MASK: 0x780) overlap contention mask.

Architecturally and performance-wise, what does "contention bit-mask" really mean? The default mask on my Xeon Gold 6250 is 0x7ff and I understand there are 11 ways. Does the contention mask of 0x600 mean that the upper 2 ways are somehow special? Special in what way? Given that the default mask of 0x7ff overlaps the contention mask, why does rdtset warn me when the mask I provide (0x780) overlaps the contention mask? What are the performance consequences that it's trying to warn me about? Should I avoid using the upper 2 ways when giving masks to rdtset?

kmabbasi commented 3 years ago

Hi, The contention bit mask is shared by CPU cores and other entities (e.g IO device such as PCIe, CXL, etc... ).

Yes, you are right the upper 2 ways of 0x7ff are the contention mask.

rdtset warns because depending on the application type, overlapping with these may impact your application performance. You can also see this https://github.com/intel/intel-cmt-cat/issues/135

Thanks, Khawar

kmabbasi commented 3 years ago

I am going to close this issue by considering that this issue has been resolved.

You can open or create new ticket, if you need our support.

Thanks, Khawar