intel / intel-cmt-cat

User space software for Intel(R) Resource Director Technology
http://www.intel.com/content/www/us/en/architecture-and-technology/resource-director-technology.html
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AMD Slow Memory Bandwidth Allocation 0.1 #235

Closed babumoger closed 6 months ago

babumoger commented 1 year ago

Add new AMD feature X86_FEATURE_SMBA. With this feature, the QOS enforcement policies can be applied to external slow memory connected to the host. QOS enforcement is accomplished by assigning a Class Of Service (COS) to a processor and specifying allocations or limits for that COS for each resource to be allocated. Kernel changes are available here, https://lore.kernel.org/lkml/20230113152039.770054-1-babu.moger@amd.com/

Description

This feature is identified by the CPUID Function 8000_0020_EBX_x0.

CPUID Fn8000_0020_EBX_x0 AMD Bandwidth Enforcement Feature Identifiers (ECX=0)

Bits Field Name Description 2 L3SBE L3 external slow memory bandwidth enforcement

CXL.memory is the only supported "slow" memory device. With the support of SMBA feature, the hardware enables bandwidth allocation on the slow memory devices. If there are multiple slow memory devices in the system, then the throttling logic groups all the slow sources together and applies the limit on them as a whole.

The presence of the SMBA feature(with CXL.memory) is independent of whether slow memory device is actually present in the system. If there is no slow memory in the system, then setting a SMBA limit will have no impact on the performance of the system.

Presence of CXL memory can be identified by numactl command.

$numactl -H available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 node 0 size: 63678 MB node 0 free: 59542 MB node 1 cpus: node 1 size: 16122 MB node 1 free: 15627 MB node distances: node 0 1 0: 10 50 1: 50 10

CPU list for CXL memory will be empty. The cpu-cxl node distance is greater than cpu-to-cpu distances. Node 1 has the CXL memory in this case. CXL memory can also be identified using ACPI SRAT table and memory maps.

Feature description is available in the specification, "AMD64 Technology Platform Quality of Service Extensions, Revision: 1.03 Publication # 56375 Revision: 1.03 Issue Date: February 2022". Link: https://www.amd.com/en/support/tech-docs/amd64-technology-platform-quality-service-extensions

Affected parts

Motivation and Context

With this feature, the QOS enforcement policies can be applied to the external slow memory connected to the host. QOS enforcement is accomplished by assigning a Class Of Service (COS) to a processor and specifying allocations or limits for that COS for each resource to be allocated.

How Has This Been Tested?

Tested on AMD machine and sanity tested on Intel machine to verify for regression.

Types of changes

Checklist:

babumoger commented 6 months ago

New pull request has been created. https://github.com/intel/intel-cmt-cat/pull/259. Closing this one.