Closed ESI-SYD closed 2 weeks ago
This change (grid order adjustment to improve cache hit) originating from https://github.com/intel/intel-xpu-backend-for-triton/pull/2600. Batched gemm only. ~99% of XeTLA for 4096x8x128x16384.
grid
4096x8x128x16384
This change (
gridorder adjustment to improve cache hit) originating from https://github.com/intel/intel-xpu-backend-for-triton/pull/2600. Batched gemm only. ~99% of XeTLA for4096x8x128x16384.