Closed etiotto closed 2 days ago
Can you provide a PR description?
Added a description.
This PR can resolve this particular issue, but there can still be issues e.g. the operation uses part of the result that should not be propagated and it has blocked pointer type, then the pass would incorrectly propagated the type. Please create an issue to handle that.
Tracked using https://github.com/intel/intel-xpu-backend-for-triton/issues/2762
Fix Intel coalescing pass for cases where the result of a SCF loop (containing a coalescable block ptr load) is used by an operation with operands that do not have block ptr type (e.g.
tt.reduce
)