This patch implements sha1_mb for aarch64 over cpu feature ASIMD,
which can be useful when crypto extension is not supported.
It is enabled for A57/A72/N1, where performance benefit is observed.
Note: ASIMD implementation can run at full capacity for 4-lanes of
user input, performance will decrease for less than 4. Consequently,
We only run ASIMD for 4- and 3-lane of input (in case of 3, we lost
about 25% of throughput). There is no point to use ASIMD for 2- or
1-lane of input (throughput lost about 50% and 75% respectively)
Change-Id: I3328a0c53be868a0220f993b7de80f3e8eacd0a0
Signed-off-by: Daniel Hu Daniel.Hu@arm.com
This patch implements sha1_mb for aarch64 over cpu feature ASIMD, which can be useful when crypto extension is not supported. It is enabled for A57/A72/N1, where performance benefit is observed.
Note: ASIMD implementation can run at full capacity for 4-lanes of user input, performance will decrease for less than 4. Consequently, We only run ASIMD for 4- and 3-lane of input (in case of 3, we lost about 25% of throughput). There is no point to use ASIMD for 2- or 1-lane of input (throughput lost about 50% and 75% respectively)
Change-Id: I3328a0c53be868a0220f993b7de80f3e8eacd0a0 Signed-off-by: Daniel Hu Daniel.Hu@arm.com