Open Juyash opened 5 months ago
Hi, can you please elaborate your question? What do you exactly want to achieve?
Hello, i would like to program MAX10 fpga using microcontroller. how the microcontroller can communicate to jtag server in the host pc ?
Although it doesn't seem to make much sense to me, if remote operation is enabled in server setup, it can be accessed from a microcontroller through network. Consider that JTAG server protocol is relative complex. Acessing MAX10 JTAG directly through an embedded interface would be much simpler.
yes, you are right.
so the setup look like
" if remote operation is enabled in server setup, it can be accessed from a microcontroller through network" how microcontroller can access the server through network ?
O.k., your latest description gives a different picture, you apparently want to connect PC to MAX10 JTAG through microcontroller. That hasn't much to do with libaji, the context of this repository. I suggest to address the question to Intel FPGA forum.
Which JTAG functions do you need? On-chip memory (CFM/UFM) programming, volatile (.sof) programming, debug functions, e.g. Signaltap. For On-chip memory programming, I'd suggest remote update solutions.
I am looking for JTAG functions for debug(Signaltap). Could you please suggest remote debug solutions for the PC and microcontroller+MAX10 connected through ethernet.
Thank you.
Intel solution for remote debug is described in AN693 https://www.intel.com/content/www/us/en/docs/programmable/723698/current.html Addtional info and mmlink sources https://www.rocketboards.org/foswiki/Projects/RemoteSystemDebug https://releases.rocketboards.org/2015.08/remotedebug/src/
Newer solution supported with Quartus Pro is JTAG-over-protocol https://www.intel.com/content/www/us/en/docs/programmable/728673/21-3.html
Thankyou.
As per AN693, Altera SoC is required. The mmlink can only be used in HPS. and JTAG-over-protocol is supported on SoC not on Intel MAX10
I can't use a SoC, I would like to achieve debugging using a microcontroller.
Hi, as also mentioned in AN693, the solution can either use external or internal uC. JoP can't be used because it's only supported by Quartus Pro, as stated.
Hi,
I have carefully read AN693. In case of internal uC, the SLD hub controller driver is required. from Rocketboards my understanding is that "mmlink application that bridges the SLD Hub to the Ethernet:".
If external uC is used, the what physical interface could be used to connect the SLD in FPGA ?
Note ; You cannot remote debug hardware using a JTAG connection through the JTAG TAP controller after instantiating the SLD Hub Controller component. (Reference : Page 3, AN693)
Thank you.
Hello,
For a hobby project , I need to access the JTAG data by communicating the JTAG server to program a MAX10 FPGA, could you please suggest some solutions/hint to do it.
Thankyou.