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Refactor how default value for vectorization switch is selected in intel/llvm#2402 #2421

Open AlexeySachkov opened 4 years ago

AlexeySachkov commented 4 years ago

There is a comment from @bader:

@AlexeySachkov, I would prefer if we disable vectorizers only for SPIR target as I noted here. So if Xilinx FPGA uses different triple, it can still control the default behavior. NOTE: NVPTX, doesn't completely disables the vectorizer - https://github.com/intel/llvm/blob/sycl/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h#L65. It's not clear what is the impact on performance for NVPTX.

Which needs to be applied

KornevNikita commented 4 months ago

Hi! There have been no updates for at least the last 60 days, though the ticket has assignee(s).

@AlexeySachkov, could I ask you to take one of the following actions? :)

Thanks!

github-actions[bot] commented 2 months ago

Hi! There have been no updates for at least the last 60 days, though the issue has assignee(s).

@AlexeySachkov, could you please take one of the following actions:

Thanks!

github-actions[bot] commented 7 minutes ago

Hi! There have been no updates for at least the last 60 days, though the issue has assignee(s).

@AlexeySachkov, could you please take one of the following actions:

Thanks!