Signal naming improvements - Githubissues

intel / rohd

The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.

https://intel.github.io/rohd-website

BSD 3-Clause "New" or "Revised" License

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Signal naming improvements #439

Closed mkorbel1 closed 11 months ago

mkorbel1 commented 11 months ago

Description & Motivation

This PR attempts to improve generated SystemVerilog from ROHD by:

Choosing naming for generated outputs more intelligently
Providing more control over naming in generated outputs

Also, disabling --validate-links for dart doc due to https://github.com/dart-lang/dartdoc/issues/3584 since this PR adds Naming enum that includes functions.

Related Issue(s)

Fix #274 Fix #291 Fix #408 Fix #151 Close #293, unable to reproduce Adjusted #395, now uses order of port declaration rather that string sorting

Testing

Added extensive testing

Backwards-compatibility

Is this a breaking change that will not be backwards-compatible? If yes, how so?

Functionally, it is not, but generated SV will look different (better, hopefully).

Documentation

Does the change require any updates to documentation? If so, where? Are they included?

Yes, added new documentation for the user guide and updated API docs.