In Module, the subModules API uses an UnmodifiableListView to view a collection _modules which is a Set. When subModules is iterated upon, this gets a huge performance penalty when the number of sub-modules is large. This was noticed in long run-times for generating SystemVerilog due to a for (final subModule in module.subModules) in _SynthModuleDefinition in "systemverilog.dart".
To Reproduce
Create a large (~50k originally found this) number of sub-modules within a module and generate the SystemVerilog.
Expected behavior
Fast
Actual behavior
Slow
Additional: Dart SDK info
No response
Additional: pubspec.yaml
No response
Additional: Context
We should create a benchmark that reproduces and protects against this issue.
We should do a review for any other similar issues.
Describe the bug
In
Module
, thesubModules
API uses anUnmodifiableListView
to view a collection_modules
which is aSet
. WhensubModules
is iterated upon, this gets a huge performance penalty when the number of sub-modules is large. This was noticed in long run-times for generating SystemVerilog due to afor (final subModule in module.subModules)
in_SynthModuleDefinition
in "systemverilog.dart".To Reproduce
Create a large (~50k originally found this) number of sub-modules within a module and generate the SystemVerilog.
Expected behavior
Fast
Actual behavior
Slow
Additional: Dart SDK info
No response
Additional: pubspec.yaml
No response
Additional: Context
We should create a benchmark that reproduces and protects against this issue.
We should do a review for any other similar issues.