intel / synce4l

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SyncE input priority not reset on exit #34

Closed mlichvar closed 6 months ago

mlichvar commented 9 months ago

When synce4l starts, it sets the synce priority (C827_0-RCLKA with E810) to 15. Later, if valid QL is received, it sets the priority to 0. But when synce4l is terminated, that priority stays there and the input stays connected even when nothing is checking the QL.

kubalewski commented 6 months ago

Fix merged.