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intel / systemc-compiler

This tool translates synthesizable SystemC code to synthesizable SystemVerilog.
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userguide #72

Closed guojt10 closed 3 months ago

guojt10 commented 3 months ago

Can userguide add the following information?

  1. What kind of systemc coding can be translated into "assign" statements， for exanple "assign a = b;" ?
  2. How does systemc describe bit operations, e.g. assign b[0] = a[0] & a[1]; ?

Looking forward to your reply。

mikhailmoiseev commented 3 months ago

Answering your questions:

  1. Generally, designing in SystemC it make sense to understand which hardware will be created in ASIC/FPGA, not which SV will be generated. To assign one signal to another SC_METHOD is used in SystemC, which is normally translated into always_comb block. SC_METHOD without sensitivity is translated into assign, but right part can be a constant or literal only.
  2. Bit operations implemented in SystemC integer types. See sc_uint/sc_biuint in IEEE 1666-2023.
guojt10 commented 3 months ago

It's all settled.