I am currently working on a project where we are using xed to decode x86 binaries.
Now we are trying to expand our support to RISC-V (as host architecture).
But we noticed that xed is not able to be built on RISC-V, because normalize_cpu_name does not understand riscv64.
I am currently working on a project where we are using xed to decode x86 binaries. Now we are trying to expand our support to RISC-V (as host architecture).
But we noticed that xed is not able to be built on RISC-V, because normalize_cpu_name does not understand riscv64.
Simply adding another branch for "riscv64" here fixes it according to my testing: https://github.com/intelxed/mbuild/blob/75cb46e6536758f1a3cdb3d6bd83a4a9fd0338bb/mbuild/env.py#L1218-L1240