XCHG 0b1001-0 rexb-prefix

[lyrachord]

Hi again

`xed-isa.txt: 7143 { ICLASS : XCHG CPL : 3 CATEGORY : DATAXFER EXTENSION : BASE ISA_SET : I86

PATTERN : 0b1001_0 SRM[rrr] SRM!=0 OPERANDS : REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL

` This is strange. REG0 is r8w, r8d or r8 depending on the EOSZ. mode64

should be rexr_prefix and GPRv_R()?

PATTERN : 0b1001_0 SRM[rrr] SRM=0 not_refining_f3 rexb_prefix OPERANDS : REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL }

`sdm-vol-2 In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15).

[lyrachord]

Sorry, something I missed

Table 3-1. Register Codes Associated With +rb, +rw, +rd, +ro