AMX: XED allows illegal register combinations

[flobernd]

Hi there,

regarding to the SDM, the exception class AMX-E4 includes the following condition:

UD if srcdest == src1 OR src1 == src2 OR srcdest == src2

Currently XED allows to decode AMX instructions that do violate this condition. For example:

> xed-ex1 -64 C4 E2 79 5E DB
Attempting to decode: c4 e2 79 5e db
iclass TDPBUSD  category AMX_TILE       ISA-extension AMX_INT8  ISA-set AMX_INT8
instruction-length 5
operand-width 32
effective-operand-width 32
effective-address-width 64
stack-address-width 64
iform-enum-name TDPBUSD_TMMi32_TMMu32_TMMu32
iform-enum-name-dispatch (zero based) 0
iclass-max-iform-dispatch 1
Nominal opcode position 3
Nominal opcode 0x5e
Operands
#   TYPE               DETAILS        VIS  RW       OC2 BITS BYTES NELEM ELEMSZ   ELEMTYPE   REGCLASS
#   ====               =======        ===  ==       === ==== ===== ===== ======   ========   ========
0   REG0             REG0=TMM3   EXPLICIT  RW        TV    0     0     0     32        INT       TREG
1   REG1             REG1=TMM3   EXPLICIT   R        TV    0     0     0     32       UINT       TREG
2   REG2             REG2=TMM0   EXPLICIT   R        TV    0     0     0     32       UINT       TREG
Memory Operands
  MemopBytes = 0
ATTRIBUTES: NOTSX
MANDATORY 66 PREFIX
EXCEPTION TYPE: AMX_E4
AMX
ISA SET: [AMX_INT8]
0       CPUID GROUP NAME: [AMX_INT8]
        0       CPUID RECORD NAME: [AMX_TILES]
                {Leaf 0x00000007, subleaf 0x00000000, EDX[24:24]} = 1
        1       CPUID RECORD NAME: [AMX_INT8]
                {Leaf 0x00000007, subleaf 0x00000000, EDX[25:25]} = 1
tdpbusd tmm3, tmm3, tmm0

This behavior is inconsistent to e.g. the GATHER instructions which do have similar constraints. XED correctly rejects these forms.

[marjevan]

Hi, For now, XED does not support illegal tile combination checks (as mentioned above). Once available, we will publish an announcement within the external release notes.

[flobernd]

No hurries 🙂 I just noticed that while comparing XED decoder output to Zydis decoder output and wanted to let you know!

[marjevan]

Support will be available with the upcoming external release.

[marjevan]

Solved this in https://github.com/intelxed/xed/commit/6d87b5481aa53b5ab1fc2b5a5622759c46746bf9