Closed herumi closed 7 months ago
"Intel Advanced Performance Extensions Revision 1.0" says,
p.256 9.1 CCMPSCC EVEX.LLZ.NP.MAP4.IGNORED 38 /r CCMPB {ND=1} r8/m8, r8, dfv
and
p.267 9.1.2 Description The ND bit is required to be set to 1,
so, I think EVEX.ND should be 1, but
CCMPB
PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
shows ND=0. Which is correct?
xed -version Copyright (C) 2022, Intel Corporation. All rights reserved. XED version: [v2023.08.21] % xed -64 -d 624CA40839FE 624CA40839FE ICLASS: CCMPS CATEGORY: APX EXTENSION: APXEVEX IFORM: CCMPS_GPRv_GPRv_DFV_APX ISA_SET: APX_F ATTRIBUTES: SCALABLE SHORT: ccmps r30, r31, dfv4 # set ND=1 of Payload byte 3 % xed -64 -d 624CA41839FE 624CA41839FE ERROR: GENERAL_ERROR Could not decode at offset: 0x0 len: 6 PC: 0x0: [624CA41839FE]
Please use "Intel Advanced Performance Extensions Revision 2.0" (Intel's SDM). The ND specification for CCMPscc instructions is updated to be set.
"Intel Advanced Performance Extensions Revision 1.0" says,
and
so, I think EVEX.ND should be 1, but
CCMPB
shows ND=0. Which is correct?