[V]EXTRACTPS uses register Byte4 or y(B4/B8)

[lyrachord]

ICLASS:      VEXTRACTPS
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512F_128N
EXCEPTIONS:     AVX512-E9NF
REAL_OPCODE: Y
PATTERN:    EVV 0x17 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8()
OPERANDS:    REG0=GPR32_B():w:d:f32 REG1=XMM_R3():r:dq:f32 IMM0:r:b
IFORM:       VEXTRACTPS_GPR32f32_XMMf32_IMM8_AVX512

By document:

In 64-bit mode, destination register operand has default operand size of 64 bits. 
The upper 32-bits of the register are filled with zero. REX.W is ignored.

128-bit Legacy SSE version: 
When a REX.W prefix is used in 64-bit mode with a general purpose register (GPR) 
as a destination operand, the packed single quantity is zero extended to 64 bits.

VEX.128 and EVEX encoded version: 
When VEX.W1 or EVEX.W1 form is used in 64-bit mode with a general purpose register (GPR) 
as a destination operand, the packed single quantity is zero extended to 64 bits.

So the WIG notation is wrong, and GPR32 should be GPRy.

[markcharney]

hi. they are semantically equivalent. 32b reg writes always zero extend to 64b.

[lyrachord]

Yes, zero-extend is clear in document.

The question is XED ignores the register ordinal besides the size.

nasm input

VEXTRACTPS r8, xmm1, 2
VEXTRACTPS rax, xmm1, 2

nasm output

00000060  62D37D0817C802    vextractps r8d,xmm1,byte 0x2
00000067  62F37D0817C802    vextractps eax,xmm1,byte 0x2

xed output

XDIS 60: AVX512    AVX512EVEX 62D37D0817C802           vextractps eax, xmm1, 0x2
XDIS 67: AVX512    AVX512EVEX 62F37D0817C802           vextractps eax, xmm1, 0x2

And by document, the result should r8 and rax instead of its low bytes which languages care.

[markcharney]

You need to specify the machine mode (32b vs 64b). Usually XED can figure it out from the input file but in this case it is not. So if you add a "-64" to the command line it'll show you what you expect.

Here are some instructive examples for your specific situation:

% obj/examples/xed -d 62D37D0817C802 62D37D0817C802 ICLASS: VEXTRACTPS CATEGORY: AVX512 EXTENSION: AVX512EVEX IFORM: VEXTRACTPS_GPR32f32_XMMf32_IMM8_AVX512 ISA_SET: AVX512F_128N SHORT: vextractps eax, xmm1, 0x2

% obj/examples/xed -d 62F37D0817C802 62F37D0817C802 ICLASS: VEXTRACTPS CATEGORY: AVX512 EXTENSION: AVX512EVEX IFORM: VEXTRACTPS_GPR32f32_XMMf32_IMM8_AVX512 ISA_SET: AVX512F_128N SHORT: vextractps eax, xmm1, 0x2

And with -64 specified:

% obj/examples/xed -64 -d 62F37D0817C802 62F37D0817C802 ICLASS: VEXTRACTPS CATEGORY: AVX512 EXTENSION: AVX512EVEX IFORM: VEXTRACTPS_GPR32f32_XMMf32_IMM8_AVX512 ISA_SET: AVX512F_128N SHORT: vextractps eax, xmm1, 0x2

% obj/examples/xed -64 -d 62D37D0817C802 62D37D0817C802 ICLASS: VEXTRACTPS CATEGORY: AVX512 EXTENSION: AVX512EVEX IFORM: VEXTRACTPS_GPR32f32_XMMf32_IMM8_AVX512 ISA_SET: AVX512F_128N SHORT: vextractps r8d, xmm1, 0x2

[lyrachord]

Sorry for my fast test. IMO the result of General-B8 is more consistent and better than semantically equivalence.