Introduce a feature to run small simulations/tests as Vivado projects

[jhegeman]

This new feature allows one to run small 'unit tests' as Vivado simulation projects as part of the well-known IPBB command structure and work flow.

This basically introduces the following conventions and functionality:

• Test bench code (HDL and waveform configurations) are stored in firmware/test directories.
• The convention is to name test bench code and configuration starting with 'tb_'.
• Test bench code can be added to a Vivado simulation project using 'tb' as specifier in the dependency files.
• The following additional dependency file variables/parameters have been implemented:
  • @vivado.sim_top_entity -> For the top-level entity in the simulation project.
  • @vivado.sim_duration -> Setting for xsim.simulate.runtime.
  • @vivado.sim_rangecheck = "true" -> Setting for xsim.elaborate.rangecheck.
• Test bench projects can be created, dep-checked, and generated using the standard 'ipbb proj create vivado' syntax.
• Test bench projects ran be run (i.e., the simulation gets run) using the new 'ipbb vivado simulate' command. The exit code from this command reflects the success/failure of the simulation step.

[jhegeman]

As promised, here is a little recipe to demonstrate how this could be used. The recipe uses the TCDS2 cyclic generator testbench as example.

ipbb init trial_area
cd trial_area
ipbb add git https://:@gitlab.cern.ch:8443/cms-tcds/cms-tcds2-firmware.git
cd proj
ipbb proj create vivado sim_cyclic_gen cms-tcds2-firmware:components/cyclic_generator tb_cyclic_generator.d3
cd sim_cyclic_gen
ipbb dep report
ipbb vivado generate-project
ipbb vivado check-syntax
ipbb vivado simulate

[tswilliams]

@jhegeman : This all looks good to me, but just as I was about to merge, I realised that there's an errant new file included in the branch: a

Can you remove this? I'll then proceed with the merge. Thanks!

[jhegeman]

Ok, done. Sorry for the delay.