Support for VivadoHLS

[alessandrothea]

Add a vivado_hls project workflow, which includes

• HLS project creation via dep/d3 files
• Execution of C-synthesis, C-sim and Cosimulation
• Export of generated code as ip reposity or others
• Generation of XCI files

For this first iteration, the same package/component structure as classic ipbb repositories will be adopted, as a way to better understand how hls code can be organised. This will be reviewd at a later stage, taking into account the software perspective as well.

This the outline of the changes required for the first iteration:

• extension of dep syntax to hls sources
• basic command to create project + solution
• commands for running synth, sim and cosim
• strategy to handle include paths
• command to export the iprepo + repo handling strategy in the work area
• generation of XCI files
• black magic to make vivado projects aware of embedded hls parts and semi-automatic magical running of all the steps above

[alessandrothea]

First round completed in #71 Next steps are

• iprepo generation
• xci generation

[alessandrothea]

Final push for the HLS workflow:

• ip catalog generation is now working
• as well as xci file generation

There is plenty of room for improvement for naming conventions, but those can be tuned later, for as much as Vivado allows.

The last remaining question, i.e. how to make the ip available to Vivado for integration with the HDL project has been solved by declaring that (by default) the ip catalog/xci are copied back to the same component where the hls code resides, in the cgn subfolder. They can be picked up from there by a vivado dep file.

[DavidMonk00]

Hi, what is the status of this in 2023? Is there an example project/walkthrough that shows the extra steps compared to a purely VHDL project?