[LLVMCPU] RISC-V failed to build int8 MobileNetV2 and EfficientNet

[pzread]

With the LLVM integration https://github.com/openxla/iree/pull/15020, RISC-V failed to build these targets with error:

cd /work/build-e2e-test-artifacts/tests/e2e/test_artifacts && /work/full-build-dir/install/bin/iree-compile --output-format=vm-bytecode --mlir-print-op-on-diagnostic=false --iree-hal-target-backends=llvm-cpu --iree-input-type=tosa --iree-llvmcpu-target-triple=riscv32-pc-linux-gnu --iree-llvmcpu-target-cpu=generic-rv32 --iree-llvmcpu-target-abi=ilp32 --iree-llvmcpu-target-cpu-features=+m,+a,+f,+zvl512b,+zve32f --riscv-v-fixed-length-vector-lmul-max=8 /work/build-e2e-test-artifacts/e2e_test_artifacts/iree_MobileNetV2_int8_tflite_.mlir -o /work/build-e2e-test-artifacts/e2e_test_artifacts/iree_module_MobileNetV2_int8_tflite___riscv_32-generic-linux_gnu-llvm_cpu__default-flags_/module.vmfb --iree-hal-executable-object-search-path=\"/work/build-e2e-test-artifacts\"
iree-compile: /work/third_party/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2051: virtual void llvm::RISCVDAGToDAGISel::Select(llvm::SDNode *): Assertion `RISCVTargetLowering::getRegClassIDForVecVT(SubVecContainerVT) == InRegClassID && "Unexpected subvector extraction"' failed.
Please report issues to https://github.com/openxla/iree/issues and include the crash backtrace.
Stack dump:
0.  Program arguments: /work/full-build-dir/install/bin/iree-compile --output-format=vm-bytecode --mlir-print-op-on-diagnostic=false --iree-hal-target-backends=llvm-cpu --iree-input-type=tosa --iree-llvmcpu-target-triple=riscv32-pc-linux-gnu --iree-llvmcpu-target-cpu=generic-rv32 --iree-llvmcpu-target-abi=ilp32 --iree-llvmcpu-target-cpu-features=+m,+a,+f,+zvl512b,+zve32f --riscv-v-fixed-length-vector-lmul-max=8 /work/build-e2e-test-artifacts/e2e_test_artifacts/iree_MobileNetV2_int8_tflite_.mlir -o /work/build-e2e-test-artifacts/e2e_test_artifacts/iree_module_MobileNetV2_int8_tflite___riscv_32-generic-linux_gnu-llvm_cpu__default-flags_/module.vmfb --iree-hal-executable-object-search-path=\"/work/build-e2e-test-artifacts\"
1.  Running pass 'Function Pass Manager' on module 'llvm_module_linked_llvm_cpu'.
2.  Running pass 'RISC-V DAG->DAG Pattern Instruction Selection' on function '@main_dispatch_2_conv_2d_nhwc_hwcf_1x112x112x32x3x3x3_i8xi8xi32'
 #0 0x00007f41bbe5567b llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /work/third_party/llvm-project/llvm/lib/Support/Unix/Signals.inc:723:13
 #1 0x00007f41bbe536d0 llvm::sys::RunSignalHandlers() /work/third_party/llvm-project/llvm/lib/Support/Signals.cpp:106:18
 #2 0x00007f41bbe55d5f SignalHandler(int) /work/third_party/llvm-project/llvm/lib/Support/Unix/Signals.inc:413:1
 #3 0x00007f41b660f420 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14420)
 #4 0x00007f41b644c00b raise (/lib/x86_64-linux-gnu/libc.so.6+0x4300b)
 #5 0x00007f41b642b859 abort (/lib/x86_64-linux-gnu/libc.so.6+0x22859)
 #6 0x00007f41b642b[729](https://github.com/openxla/iree/actions/runs/6288024877/job/17073200412#step:7:730) (/lib/x86_64-linux-gnu/libc.so.6+0x22729)
 #7 0x00007f41b643cfd6 (/lib/x86_64-linux-gnu/libc.so.6+0x33fd6)
 #8 0x00007f41c0709580 llvm::RISCVDAGToDAGISel::Select(llvm::SDNode*) /work/third_party/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2005:7
 #9 0x00007f41c0b4927e llvm::SmallVectorTemplateCommon<llvm::SDNode*, void>::isSmall() const /work/third_party/llvm-project/llvm/include/llvm/ADT/SmallVector.h:146:39

[pzread]

To reproduce:

Download the MLIR: https://storage.googleapis.com/iree-github-actions-postsubmit-artifacts/6303857967/1/e2e-test-artifacts/iree_MobileNetV2_int8_tflite_.mlir

Run:

iree-compile --output-format=vm-bytecode --mlir-print-op-on-diagnostic=false --iree-hal-target-backends=llvm-cpu --iree-input-type=tosa --iree-llvmcpu-target-triple=riscv32-pc-linux-gnu --iree-llvmcpu-target-cpu=generic-rv32 --iree-llvmcpu-target-abi=ilp32 --iree-llvmcpu-target-cpu-features=+m,+a,+f,+zvl512b,+zve32f --riscv-v-fixed-length-vector-lmul-max=8 iree_MobileNetV2_int8_tflite_.mlir -o module.vmfb

[topperc]

This patch may fix it

diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index c4942f9c637b..ee9957795f97 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -8641,6 +8641,9 @@ SDValue RISCVTargetLowering::lowerINSERT_SUBVECTOR(SDValue Op,
                          DAG.getUNDEF(ContainerVT), SubVec,
                          DAG.getConstant(0, DL, XLenVT));
     if (OrigIdx == 0 && Vec.isUndef() && VecVT.isFixedLengthVector()) {
+      if (ContainerVT != OrigContainerVT)
+        SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, OrigContainerVT, OrigVec,
+                             SubVec, DAG.getVectorIdxConstant(0, DL));
       SubVec = convertFromScalableVector(VecVT, SubVec, DAG, Subtarget);
       return DAG.getBitcast(Op.getValueType(), SubVec);
     }

[lukel97]

A fix was landed in https://github.com/llvm/llvm-project/commit/b14f6eebc9e2c56c325fe72aa29a1f042bb9e9b3, does that fix the crash here?

[pzread]

A fix was landed in llvm/llvm-project@b14f6ee, does that fix the crash here?

Confirmed the issue has been fixed, thanks!