rmm: Enable FEAT_ECV to use CNTPOFF_EL2

[bitboom]

This PR enables FEAT_ECV to use CNTPOFF_EL2.

We couldn't use the CNTPOFF_EL2 register because FEAT_ECV was not enabled. So we used S3_4_C14_C0_6 as a workaround.

According to the Arm specification, FEAT_ECV must be enabled to use CNTPOFF_EL2, so in this PR, i've enabled FEAT_ECV used the correct register name.

This PR emits an warning like below. However, it is better to use the correct target-feature to ensure proper functionality.

$ cargo build
warning: unknown and unstable feature specified for `-Ctarget-feature`: `ecv`
  |
  = note: it is still passed through to the codegen backend, but use of this feature might be unsound and the behavior of this feature can change in the future
  = help: consider filing a feature request

---

Arm A-Profile Spec

CNTPOFF_EL2, Counter-timer Physical Offset Register

This register is present only when FEAT_ECV is implemented. Otherwise, direct accesses to CNTPOFF_EL2 are UNDEFINED.

LLVM Version (18.1.4)

ref) llvm/lib/Target/AArch64/AArch64SystemOperands.td

// v8.6a Enhanced Counter Virtualization
//                                 Op0   Op1    CRn     CRm     Op2
let Requires = [{ {AArch64::FeatureEnhancedCounterVirtualization} }] in {
...
def : RWSysReg<"CNTPOFF_EL2",      0b11, 0b100, 0b1110, 0b0000, 0b110>;
...
}