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ispras / utopia-hls

Utopia: a High-Level Synthesis framework
Apache License 2.0
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DFCxx -> SystemVerilog pipeline parametrization #24

Closed Muxianesty closed 3 months ago

Muxianesty commented 3 months ago

Mentioned in #23 .

DFCxx now supports different output paths for different artifacts. Now an output path for SystemVerilog has to be set explicitly (option --out <PATH>)

Muxianesty commented 3 months ago

When applying this PR, I receive a segmentation fault upon the following usage of the tool:

build/src/umain hls --config examples/polynomial2/polynomial2.json -l

I mentioned this in the PR's description: Now an output path for SystemVerilog has to be set explicitly (option --out <PATH>). I didn't include this in README.md, because this PR is intermediate and README.md will change in another Pull Request with CLI being able to support different output formats.