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jacobly0 / llvm-project

This fork of the canonical git mirror of the LLVM subversion repository adds (e)Z80 targets. Please refer to the wiki for important build instructions.
https://github.com/jacobly0/llvm-project/wiki
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Assertion failed: Subtarget.hasIndexHalfRegs() && "Need index half registers" #38

Closed commonkestrel closed 1 year ago

commonkestrel commented 1 year ago

I have received the error Assertion failed: Subtarget.hasIndexHalfRegs() && "Need index half registers", file C:\toolchains\ti\llvm-project\llvm\lib\Target\Z80\Z80InstrInfo.cpp, line 540 a few times when compiling specific Rust core functions for the EZ80. I don't think it has anything to do with the actual compilation, but I could be wrong. The Rust compiler is using LLVM version 1.15.07

The LLVM-IR looks like this:

; alloc::raw_vec::RawVec<T,A>::reserve_for_push
; Function Attrs: noinline nounwind
define internal fastcc void @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17ha20082cec3400a69E"(ptr noalias nocapture noundef align 4 dereferenceable(8) %self, i32 noundef %len) unnamed_addr #1 {
start:
  %_24.i = alloca %"core::option::Option<(core::ptr::non_null::NonNull<u8>, core::alloc::layout::Layout)>", align 4
  %self3.i = alloca %"core::result::Result<core::ptr::non_null::NonNull<[u8]>, alloc::collections::TryReserveError>", align 4
  tail call void @llvm.experimental.noalias.scope.decl(metadata !15)
  %0 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %len, i32 1)
  %_40.1.i = extractvalue { i32, i1 } %0, 1
  br i1 %_40.1.i, label %bb5.i1, label %bb5.i

bb5.i:                                            ; preds = %start
  %_40.0.i = extractvalue { i32, i1 } %0, 0
  %_16.i = load i32, ptr %self, align 4, !alias.scope !15, !noundef !11
  %v1.i = shl i32 %_16.i, 1
  %1 = tail call i32 @llvm.umax.i32(i32 %v1.i, i32 %_40.0.i)
  %2 = tail call i32 @llvm.umax.i32(i32 %1, i32 8)
  %_5.i.i = icmp sgt i32 %2, -1
  %.sroa.2.0.i.i = zext i1 %_5.i.i to i32
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %self3.i), !noalias !15
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %_24.i), !noalias !15
  %_3.i.i = icmp eq i32 %_16.i, 0
  br i1 %_3.i.i, label %bb4.i.i, label %bb5.i.i

bb5.i.i:                                          ; preds = %bb5.i
  %3 = getelementptr i8, ptr %self, i32 4
  %self.val4.i = load ptr, ptr %3, align 4, !alias.scope !15, !nonnull !11
  store ptr %self.val4.i, ptr %_24.i, align 4, !alias.scope !18, !noalias !15
  %_11.sroa.4.0..sroa_idx.i.i = getelementptr inbounds i8, ptr %_24.i, i32 4
  store i32 %_16.i, ptr %_11.sroa.4.0..sroa_idx.i.i, align 4, !alias.scope !18, !noalias !15
  %_11.sroa.5.0..sroa_idx.i.i = getelementptr inbounds i8, ptr %_24.i, i32 8
  store i32 1, ptr %_11.sroa.5.0..sroa_idx.i.i, align 4, !alias.scope !18, !noalias !15
  br label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h06974c45fc032330E.exit.i"

bb4.i.i:                                          ; preds = %bb5.i
  %4 = getelementptr inbounds %"core::option::Option<(core::ptr::non_null::NonNull<u8>, core::alloc::layout::Layout)>", ptr %_24.i, i32 0, i32 1
  store i32 0, ptr %4, align 4, !alias.scope !18, !noalias !15
  br label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h06974c45fc032330E.exit.i"

"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h06974c45fc032330E.exit.i": ; preds = %bb4.i.i, %bb5.i.i
; call alloc::raw_vec::finish_grow
  call fastcc void @_ZN5alloc7raw_vec11finish_grow17hb5125b5f173bc6c6E(ptr noalias nocapture noundef nonnull dereferenceable(12) %self3.i, i32 %2, i32 noundef %.sroa.2.0.i.i, ptr noalias nocapture noundef nonnull readonly dereferenceable(12) %_24.i) #11, !noalias !15
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %_24.i), !noalias !15
  %_57.i = load i32, ptr %self3.i, align 4, !range !21, !noalias !15, !noundef !11
  %trunc.not.i = icmp eq i32 %_57.i, 0
  %5 = getelementptr inbounds %"core::result::Result<core::ptr::non_null::NonNull<[u8]>, alloc::collections::TryReserveError>::Err", ptr %self3.i, i32 0, i32 1
  %e.09.i = load i32, ptr %5, align 4, !noalias !15
  %6 = getelementptr inbounds %"core::result::Result<core::ptr::non_null::NonNull<[u8]>, alloc::collections::TryReserveError>::Err", ptr %self3.i, i32 0, i32 1, i32 1
  %e.110.i = load i32, ptr %6, align 4, !noalias !15
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %self3.i), !noalias !15
  br i1 %trunc.not.i, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hc4001db903ccb11cE.exit.thread", label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hc4001db903ccb11cE.exit"

"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hc4001db903ccb11cE.exit.thread": ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h06974c45fc032330E.exit.i"
  %7 = inttoptr i32 %e.09.i to ptr
  %8 = getelementptr inbounds { i32, ptr }, ptr %self, i32 0, i32 1
  store ptr %7, ptr %8, align 4, !alias.scope !22
  store i32 %2, ptr %self, align 4, !alias.scope !22
  br label %_ZN5alloc7raw_vec14handle_reserve17hd2b7ac31c85e00a2E.exit

"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hc4001db903ccb11cE.exit": ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h06974c45fc032330E.exit.i"
  switch i32 %e.110.i, label %bb6.i [
    i32 -2147483647, label %_ZN5alloc7raw_vec14handle_reserve17hd2b7ac31c85e00a2E.exit
    i32 0, label %bb5.i1
  ]

bb5.i1:                                           ; preds = %start, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hc4001db903ccb11cE.exit"
; call alloc::raw_vec::capacity_overflow
  tail call fastcc void @_ZN5alloc7raw_vec17capacity_overflow17h743526e95bf6b28bE() #9
  unreachable

bb6.i:                                            ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hc4001db903ccb11cE.exit"
  %9 = icmp ult i32 %e.110.i, -2147483647, !dbg !25
  tail call void @llvm.assume(i1 %9), !dbg !25
  %10 = icmp ne i32 %e.110.i, 0, !dbg !25
  tail call void @llvm.assume(i1 %10), !dbg !25
  tail call fastcc void @__rust_alloc_error_handler(i32 noundef %e.09.i) #9, !dbg !49
  unreachable, !dbg !49

_ZN5alloc7raw_vec14handle_reserve17hd2b7ac31c85e00a2E.exit: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hc4001db903ccb11cE.exit.thread", %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hc4001db903ccb11cE.exit"
  ret void
}

The full backtrace is this:

Assertion failed: Subtarget.hasIndexHalfRegs() && "Need  index half registers", file C:\toolchains\ti\llvm-project\llvm\lib\Target\Z80\Z80InstrInfo.cpp, line 540
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: ./tools/llc.exe target/wasm32-unknown-unknown/release/deps/ti_start-6b2aa0bc67679f0f.ll -o incremental/DEMO.s -mtriple=ez80
1.      Running pass 'Function Pass Manager' on module 'target/wasm32-unknown-unknown/release/deps/ti_start-6b2aa0bc67679f0f.ll'.
2.      Running pass 'Post-RA pseudo instruction expansion pass' on function '@"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17ha20082cec3400a69E"'
0x00007FF6E25F140C (0x000000E200000016 0x0000000000000000 0x00007FF6E0363A7B 0x0000000000000000), HandleAbort() + 0xC bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\Support\Windows\Signals.inc, line 418
0x00007FF9269990ED (0x00007FF900000016 0x000000E2D898C2F0 0x0000000801000006 0xFFFFFF0100000144), raise() + 0x46D bytes(s)
0x00007FF92699AE49 (0x000000E2D898C2F0 0x0000000000000240 0x00007FF926AAD210 0x00007FF6E3B21DF0), abort() + 0x39 bytes(s)
0x00007FF9269A1345 (0x00007FF6E3B21DF0 0x00007FF6E3B21D60 0x000000E20000021C 0x000000E2D898D528), _get_wide_winmain_command_line() + 0x2895 bytes(s)
0x00007FF9269A0BD7 (0x00007FF6E3B21DF0 0x00007FF6E3B21D60 0x000002540000021C 0x000002543C2CF900), _get_wide_winmain_command_line() + 0x2127 bytes(s)
0x00007FF92699EBA1 (0x00007FF6E3B21DF0 0x00007FF6E3B21D60 0x000000080000021C 0x00007FF6E05EE8A0), _get_wide_winmain_command_line() + 0xF1 bytes(s)
0x00007FF9269A18AF (0x00007FF6E3B21DF0 0x00007FF6E3B21D60 0x000000000000021C 0x0000025400000000), _wassert() + 0x2F bytes(s)
0x00007FF6E05EE8A0 (0x000002543C2072A0 0x000002543C2BD380 0x000002543C2C1D40 0x000002543C2C1D78), llvm::Z80InstrInfo::copyPhysReg() + 0xA60 bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\Target\Z80\Z80InstrInfo.cpp, line 540 + 0x3E byte(s)
0x00007FF6E0F91962 (0x000002543C1D7CA0 0x000002543C2C1D40 0x000002543C17B6E8 0x000002543C1BD3C0), `anonymous namespace'::ExpandPostRA::LowerCopy() + 0x442 bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\CodeGen\ExpandPostRAPseudos.cpp, line 174
0x00007FF6E0F90D92 (0x000002543C1D7CA0 0x000002543C2A1110 0x000002543C1A5350 0x00007FF6E13DB556), `anonymous namespace'::ExpandPostRA::runOnMachineFunction() + 0x332 bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\CodeGen\ExpandPostRAPseudos.cpp, line 214 + 0x21 byte(s)
0x00007FF6E0A56929 (0x000002543C1D7CA0 0x000002543C166DE8 0x000002543C166DE8 0x00007FF600000003), llvm::MachineFunctionPass::runOnFunction() + 0x239 bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\CodeGen\MachineFunctionPass.cpp, line 73 + 0x1E byte(s)
0x00007FF6E13C0B4D (0x000002543C163320 0x000002543C166DE8 0x000000E200000001 0x00007FF6E13BEFBF), llvm::FPPassManager::runOnFunction() + 0x36D bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\IR\LegacyPassManager.cpp, line 1430 + 0x40 byte(s)
0x00007FF6E13C0ED7 (0x000002543C163320 0x000002543C13C3F0 0x000002543C13C3F0 0x000000E200000004), llvm::FPPassManager::runOnModule() + 0xA7 bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\IR\LegacyPassManager.cpp, line 1476 + 0x1B byte(s)
0x00007FF6E13C398B (0x000002543C13C7D0 0x000002543C13C3F0 0x000000E2D898EAD8 0x000000E2D898EAF0), `anonymous namespace'::MPPassManager::runOnModule() + 0x40B bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\IR\LegacyPassManager.cpp, line 1545 + 0x40 byte(s)
0x00007FF6E13C47E5 (0x000002543C17B3C0 0x000002543C13C3F0 0x000002543C1A5300 0x000002543C1A5378), llvm::legacy::PassManagerImpl::run() + 0x155 bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\IR\LegacyPassManager.cpp, line 535 + 0x2D byte(s)
0x00007FF6E13BAEC2 (0x000000E2D898E888 0x000002543C13C3F0 0x000002543C158A80 0x0000000000000000), llvm::legacy::PassManager::run() + 0x22 bytes(s), C:\toolchains\ti\llvm-project\llvm\lib\IR\LegacyPassManager.cpp, line 1673
0x00007FF6E04F28EA (0x000002543C117C60 0x000000E2D898F408 0x000000E2D898F640 0x000000E2D898F650), compileModule() + 0x222A bytes(s), C:\toolchains\ti\llvm-project\llvm\tools\llc\llc.cpp, line 734
0x00007FF6E04F3E1C (0x0000000000000005 0x000002543C117C60 0x0000000000000000 0x00007FF6E339944D), main() + 0x6DC bytes(s), C:\toolchains\ti\llvm-project\llvm\tools\llc\llc.cpp, line 419 + 0x15 byte(s)
0x00007FF6E3399F49 (0x00007FF6E3AE1000 0x00007FF6E3AE3F20 0x0000000000000000 0x0000000000000000), invoke_main() + 0x39 bytes(s), D:\a\_work\1\s\src\vctools\crt\vcstartup\src\startup\exe_common.inl, line 79
0x00007FF6E3399E2E (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000), __scrt_common_main_seh() + 0x12E bytes(s), D:\a\_work\1\s\src\vctools\crt\vcstartup\src\startup\exe_common.inl, line 288 + 0x5 byte(s)
0x00007FF6E3399CEE (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000), __scrt_common_main() + 0xE bytes(s), D:\a\_work\1\s\src\vctools\crt\vcstartup\src\startup\exe_common.inl, line 331
0x00007FF6E3399FDE (0x000000E2D7E8E000 0x0000000000000000 0x0000000000000000 0x0000000000000000), mainCRTStartup() + 0xE bytes(s), D:\a\_work\1\s\src\vctools\crt\vcstartup\src\startup\exe_main.cpp, line 17
0x00007FF970087614 (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000), BaseThreadInitThunk() + 0x14 bytes(s)
0x00007FF9711E26B1 (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000), RtlUserThreadStart() + 0x21 bytes(s)
jacobly0 commented 1 year ago

Hard to tell since you have removed all of the relevant parts of the IR file, but the assert suggests you are using inconsistent target info throughout the file.