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jameshegarty / rigel

Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.
MIT License
55 stars 9 forks source link

moduleparams.lua test cases #10

Open jameshegarty opened 7 years ago

jameshegarty commented 7 years ago

Go through and add more parameter sweeps to the unit tests.

jameshegarty commented 7 years ago

Add tests to test bool type, uint7 type