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jameshegarty / rigel

Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.
MIT License
56 stars 9 forks source link

Eagersdf #126

Closed jameshegarty closed 6 years ago

coveralls commented 6 years ago

Coverage Status

Coverage decreased (-0.4%) to 70.247% when pulling fd7770e17531b9b188c1630a3be2dedc990d63a5 on eagersdf into d39378a9f319cffc1e30eeef34c6b48891f59757 on master.