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jameshegarty / rigel

Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.
MIT License
56 stars 9 forks source link

Uniforms #130

Closed jameshegarty closed 5 years ago

coveralls commented 5 years ago

Coverage Status

Coverage decreased (-0.03%) to 69.104% when pulling 2c0ab201eac4a1535ccea2773ccbd831efa4dd73 on uniforms into 45fb228010537d75a2f5129bf608abf02a92e79b on master.

coveralls commented 5 years ago

Coverage Status

Coverage decreased (-0.03%) to 69.104% when pulling 2c0ab201eac4a1535ccea2773ccbd831efa4dd73 on uniforms into 45fb228010537d75a2f5129bf608abf02a92e79b on master.

coveralls commented 5 years ago

Coverage Status

Coverage decreased (-0.03%) to 69.104% when pulling 2c0ab201eac4a1535ccea2773ccbd831efa4dd73 on uniforms into 45fb228010537d75a2f5129bf608abf02a92e79b on master.