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jameshegarty / rigel

Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.
MIT License
56 stars 9 forks source link

Systoliccleanup #134

Closed jameshegarty closed 5 years ago

coveralls commented 5 years ago

Coverage Status

Coverage decreased (-21.3%) to 48.121% when pulling 7d7d6531eddc81f41f525a12faaa6b59af3ac644 on systoliccleanup into 9f2568330c7ca8f2160a1b4723c64332ab20f841 on master.