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jameshegarty / rigel

Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.
MIT License
56 stars 9 forks source link

Pulpino #140

Closed jameshegarty closed 5 years ago

coveralls commented 5 years ago

Coverage Status

Coverage increased (+0.007%) to 69.861% when pulling 005227301e1e2bd2ddb5129dd935b4f672fb4985 on pulpino into cfddeab006f2f650ef2afcd37db4d3266e7c65b9 on master.

coveralls commented 5 years ago

Coverage Status

Coverage decreased (-21.4%) to 48.463% when pulling 6d4ea33718be2c64376e73bb9bb6c022593b6ccd on pulpino into cfddeab006f2f650ef2afcd37db4d3266e7c65b9 on master.