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jameshegarty / rigel

Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.
MIT License
56 stars 9 forks source link

Harnessrefactor #93

Closed jameshegarty closed 6 years ago

coveralls commented 6 years ago

Coverage Status

Coverage decreased (-0.2%) to 66.217% when pulling 7ed8981073d9a65d6f551c1ec8ac4f424cf4c9ce on harnessrefactor into db3acc00020e46eb4083de628dc63a2d03b36570 on master.

coveralls commented 6 years ago

Coverage Status

Coverage decreased (-0.2%) to 66.217% when pulling 7ed8981073d9a65d6f551c1ec8ac4f424cf4c9ce on harnessrefactor into db3acc00020e46eb4083de628dc63a2d03b36570 on master.