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japaric / stm32f103xx-hal

HAL for the STM32F103xx family of microcontrollers
Apache License 2.0
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Add real-time-clock implementation #98

Open TheZoq2 opened 6 years ago

TheZoq2 commented 6 years ago

This PR adds a basic implementation of the RTC module. It is basic in the sense that it only supports counting up one second at a time and doesn't expose all the functionality of the module.

I had to expose a few more registers in the rcc module and I hope that implementation is correct. Would it make sense to make a separate PR which does the same thing to all the registers in rcc or is there a reason that they are hidden as they are now?

TeXitoi commented 6 years ago

I have something similar here https://github.com/TeXitoi/stm32f103xx-rtc

I'll try to review your PR, but I think that LSE initialisation must be done in clocks. Look at #38 and #93.

TheZoq2 commented 6 years ago

Yea, that makes sense now that I think about it. I suppose my implementation would break if someone else with &mut access to rcc changes things.

I'll try and look into moving LSE into clocks when I find some time :)

TheZoq2 commented 5 years ago

I finally got around to updating this PR.

Unfortunately it wasn't as easy as I thought originally because the backup domain is a bit special.

Modifying it seems to require both enabling it in apb1 and in the pwr register. APB1 is simple enough since it's part of rcc, but pwr is more tricky.

Ideally, I think we should enable LSE in freeze, but requiring PWR to call freeze would be quite a breaking change considering it's done in almost all code that uses this crate.

The solution I came up with is to add a second function to the RccExt trait that performs the initialisation of the backup domain. This function returns a token that is used to ensure that backup domain initialisation was performed.

I'm not super comfortable with this solution however so feel free to suggest something better.