Closed GoogleCodeExporter closed 8 years ago
It looks like this is how to detect -n32
#if (_MIPS_SIM == _MIPS_SIM_ABI32)
$t4 to $t7 still exist under N32... not clear why its complaining?
Original comment by fbarch...@chromium.org
on 16 Jun 2014 at 10:53
According to wikipedia[1], $12 to $15 are called $t4 to $t7. But it seems that
the GNU toolchain is calling them $t0 to $t3[2], so a line containing $t4 to
$t7 generates error like "invalid operator in 'lw $t4, 16(%[src])'", but $t0 to
$t3 passes.
[1] http://en.wikipedia.org/wiki/MIPS_instruction_set
[2] https://www.sourceware.org/ml/gdb-patches/2003-03/msg00416.html
Original comment by wenbin...@gmail.com
on 20 Jun 2014 at 8:59
So n32/n64 lost t4 - t7 and gains a4 - a7.
Some functions could use a4-a7, depending on number of args.
This may be efficient, but won't build with o32
Some functions that dont use all the 's' registers could use those instead.
portable, but will cause push/pop to preserve them.
Some use all the 't' and 's' and have many args:
void TransposeWx8_FAST_MIPS_DSPR2(const uint8* src, int src_stride,
uint8* dst, int dst_stride,
int width) {
: "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7"
lets start with only enabling the assembly for old 32 bit ABI.
Original comment by fbarch...@chromium.org
on 24 Jun 2014 at 11:06
This is the CL to only enable mips assembly with old 32 bit ABI.
https://webrtc-codereview.appspot.com/20769005
checked in as r1020
Are you able to confirm it builds?
Original comment by fbarch...@chromium.org
on 24 Jun 2014 at 11:41
Original comment by fbarch...@chromium.org
on 27 Jun 2014 at 12:57
Original issue reported on code.google.com by
wenbin...@gmail.com
on 15 Jun 2014 at 2:18