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jbeder / yaml-cpp

A YAML parser and emitter in C++
MIT License
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segmentation fault accessing Yaml::node #615

Closed alessandroaimar closed 6 years ago

alessandroaimar commented 6 years ago 
const YAML::Node network_yaml = YAML::LoadFile(network_file_name.c_str());
const YAML::Node& graph = network_yaml["graph"];

segmentation fault is triggered when get to network_yaml["graph"]. GDB reports:

Program received signal SIGSEGV, Segmentation fault.
YAML::detail::node_data::get<std::string> (this=0x69ba80, key="graph", pMemory=std::shared_ptr (count 7, weak 0) 0x696fb0)
    at ./../../../shared/lib/c/yaml-cpp/to_link/usr/local/include/yaml-cpp/node/detail/node.h:30
30    NodeType::value type() const { return m_pRef->type(); }

yaml-cpp has been compile adding -fpic flags (is there any known incompatibility?)

the YAML file is

elt_version: helium
sw_version: obninsk
sw_release: 0.1
graph:
  config:
    num_layers: 6
    num_elt_layers: 5
    max_num_pass: 1
    max_num_streams: 8
  network:
    layer:
      0:
        layer_name: roshambonet
        layer_index: 0
        op: input
        device: cpu
        elt_config: ""
        cpu_config:
          dtype: int16
          num_rows: 64
          num_columns: 64
          num_channels: 1
          num_output_streams: 8
          sparse: true
          burst_size: 1024
        data: ""
      1:
        layer_name: conv_l1_l1_bias_roshambonet_l1_relu_l1_pool
        layer_index: 1
        op: fused_conv2d_bias_relu_pool_singlepass
        device: elt
        elt_config:
          pass_idx:
            0:
              spu_num_rows: 63
              spu_num_columns: 63
              spu_num_channels: 0
              mae_kernel_size_horizontal: 4
              mae_kernel_size_vertical: 4
              composed_kernel_size_horizontal: 4
              composed_kernel_size_horizontal_one_based: 5
              composed_kernel_size_vertical: 4
              composed_kernel_size_vertical_one_based: 5
              composed_kernel_coeff: 1
              spu_num_channels_one_based: 1
              spu_min_filter_threshold: 0
              spu_enable_min_filter: 0
              spu_max_filter_threshold: 0
              spu_enable_max_filter: 0
              spu_decode_stream_length: 64
              vertical_stride: 1
              horizontal_stride: 1
              padding_left: 0
              padding_right: 0
              padding_bottom: 0
              padding_top: 0
              spu_num_output_rows: 59
              num_parallel_conv_output_rows: 3
              spu_num_parallel_read_rows: 7
              mae_kernel_size_horizontal_minus_padding_left: 4
              spu_num_columns_plus_padding_right: 63
              num_parallel_conv_output_rows_one_based: 4
              spu_num_columns_minus_mae_kernel_size: 59
              ada_tier1_mode: 3
              ada_tier2_modes: 1
              ada_tier2_threshold_enable: 1
              ada_tier2_threshold: 0
              lwg_kag_range_start_0: 0
              lwg_kag_range_end_0: 5
              lwg_kag_range_start_1: 1
              lwg_kag_range_end_1: 6
              lwg_kag_range_start_2: 2
              lwg_kag_range_end_2: 7
              lwg_kag_range_start_3: 3
              lwg_kag_range_end_3: 8
              lwg_compr_sign_enabled_0: 0
              lwg_compr_offset_enabled_0: 0
              lwg_compr_per_row_overhead_size_0: 0
              lwg_compr_sign_enabled_1: 0
              lwg_compr_offset_enabled_1: 0
              lwg_compr_per_row_overhead_size_1: 0
              lwg_compr_sign_enabled_2: 0
              lwg_compr_offset_enabled_2: 0
              lwg_compr_per_row_overhead_size_2: 0
              lwg_compr_sign_enabled_3: 0
              lwg_compr_offset_enabled_3: 0
              lwg_compr_per_row_overhead_size_3: 0
              lwg_compr_sign_enabled_4: 0
              lwg_compr_offset_enabled_4: 0
              lwg_compr_per_row_overhead_size_4: 0
              lwg_compr_sign_enabled_5: 0
              lwg_compr_offset_enabled_5: 0
              lwg_compr_per_row_overhead_size_5: 0
              lwg_compr_sign_enabled_6: 0
              lwg_compr_offset_enabled_6: 0
              lwg_compr_per_row_overhead_size_6: 0
              lwg_compr_sign_enabled_7: 0
              lwg_compr_offset_enabled_7: 0
              lwg_compr_per_row_overhead_size_7: 0
              lwg_compr_sign_enabled_8: 0
              lwg_compr_offset_enabled_8: 0
              lwg_compr_per_row_overhead_size_8: 0
              lwg_compr_sign_enabled_9: 0
              lwg_compr_offset_enabled_9: 0
              lwg_compr_per_row_overhead_size_9: 0
              lwg_compr_sign_enabled_10: 0
              lwg_compr_offset_enabled_10: 0
              lwg_compr_per_row_overhead_size_10: 0
              lwg_compr_sign_enabled_11: 0
              lwg_compr_offset_enabled_11: 0
              lwg_compr_per_row_overhead_size_11: 0
              lwg_compr_sign_enabled_12: 0
              lwg_compr_offset_enabled_12: 0
              lwg_compr_per_row_overhead_size_12: 0
              lwg_compr_sign_enabled_13: 0
              lwg_compr_offset_enabled_13: 0
              lwg_compr_per_row_overhead_size_13: 0
              lwg_compr_sign_enabled_14: 0
              lwg_compr_offset_enabled_14: 0
              lwg_compr_per_row_overhead_size_14: 0
              lwg_compr_sign_enabled_15: 0
              lwg_compr_offset_enabled_15: 0
              lwg_compr_per_row_overhead_size_15: 0
              cwg_num_flushes_per_fence: 1
              cwg_cp_step_incr_0: 0
              cwg_cp_step_incr_1: 1
              cwg_cp_step_incr_2: 2
              cwg_cp_step_incr_3: 3
              cwg_cp_step_incr_4: 4
              cwg_acc_step_incr: 1
              bias_memory_max_read_ptr: 2
              wpp_row_pool_op: 1
              wpp_mac_merge_op: 1
              wpp_col_pool_op: 1
              wpp_num_merged_lwg: 8
              wpp_num_active_lwg: 16
              wpp_truncate_start_bit: 8
              wpp_biases_shift: 8
              wpp_truncate_saturation_max: 8388607
              wpp_truncate_saturation_min: 0
              wpp_row_pool_mode: 1
              wpp_row_pool_mode_incr: 2
              wpp_row_merge_mode: 0
              wpp_row_merge_mode_incr: 1
              wpp_mac_merge_mode: 0
              wpp_mac_merge_mode_incr: 1
              wpp_mac_merge_num_valid: 8
              wpp_mac_merge_iter: 0
              wpp_col_pool_iter: 0
              wpp_cwr_mode: 2
              wpp_cwr_max_memory_ptr: 8
              wpp_cwr_out_bank_mod: 16
              wpp_col_pool_normalize: 1
              wpp_row_pool_normalize: 1
              wpp_rwr_input_counter_max: 0
              wpp_rwr_ch_counter_max: 16
              wpp_rwr_col_counter_max: 60
              wpp_rwr_row_counter_max: 60
              wpp_rwr_row_counter_increase: 2
              wpp_compressed_stream_max_limit: 960
              enable_sm_compression: 1
              wpp_id_counter_increase: 2
              isw_burst_size: 1023
              mkw_num_bal_trx: 19
              mkw_num_wem_trx: 319
              mkw_num_bias_trx: 3
              pow_num_active_fsm: 2
              isw_num_mkw_trx: 344
              pir_num_active_stream: 8
              pow_num_active_stream: 6
              osr_burst_size: 1023
              osr_stream_start_address_0: 0
              osr_stream_end_address_0: 511
              osr_stream_start_address_1: 512
              osr_stream_end_address_1: 1023
              osr_stream_start_address_2: 1024
              osr_stream_end_address_2: 1535
              osr_stream_start_address_3: 1536
              osr_stream_end_address_3: 2047
              osr_stream_start_address_4: 2048
              osr_stream_end_address_4: 2559
              osr_stream_start_address_5: 2560
              osr_stream_end_address_5: 3071
              osr_stream_start_address_6: 3072
              osr_stream_end_address_6: 3583
              osr_stream_start_address_7: 3584
              osr_stream_end_address_7: 4095
              slb_in_stream_end_address_0: 5631
              slb_in_stream_start_address_0: 4096
              slb_in_stream_end_address_1: 7167
              slb_in_stream_start_address_1: 5632
              slb_in_stream_end_address_2: 8703
              slb_in_stream_start_address_2: 7168
              slb_in_stream_end_address_3: 10239
              slb_in_stream_start_address_3: 8704
              slb_in_stream_end_address_4: 11775
              slb_in_stream_start_address_4: 10240
              slb_in_stream_end_address_5: 13311
              slb_in_stream_start_address_5: 11776
              slb_in_stream_end_address_6: 14847
              slb_in_stream_start_address_6: 13312
              slb_in_stream_end_address_7: 16383
              slb_in_stream_start_address_7: 14848
              slb_in_stream_num_entries_0: 1535
              slb_in_stream_num_entries_1: 1535
              slb_in_stream_num_entries_2: 1535
              slb_in_stream_num_entries_3: 1535
              slb_in_stream_num_entries_4: 1535
              slb_in_stream_num_entries_5: 1535
              slb_in_stream_num_entries_6: 1535
              slb_in_stream_num_entries_7: 1535
              slb_out_stream_end_address_0: 511
              slb_out_stream_start_address_0: 0
              slb_out_stream_end_address_1: 1023
              slb_out_stream_start_address_1: 512
              slb_out_stream_end_address_2: 1535
              slb_out_stream_start_address_2: 1024
              slb_out_stream_end_address_3: 2047
              slb_out_stream_start_address_3: 1536
              slb_out_stream_end_address_4: 2559
              slb_out_stream_start_address_4: 2048
              slb_out_stream_end_address_5: 3071
              slb_out_stream_start_address_5: 2560
              slb_out_stream_end_address_6: 3583
              slb_out_stream_start_address_6: 3072
              slb_out_stream_end_address_7: 4095
              slb_out_stream_start_address_7: 3584
              isw_discard_trigger: 1023
              spu_sparse_matrix_mode: true
        cpu_config:
          num_input_streams: 8
          num_output_streams: 6
          num_pass: 1
          input_burst_size: 1024
          output_burst_size: 1024
          config_burst_size: 1024
        data:
          pass_idx:
            0: !<tag:yaml.org,2002:binary> "WYA/AFqAPwBbgAAAboAEAG+ABABygAQAc4AFAHSABAB1gAUAcYABAFyAAQBjgAAAZIAAAGWAAABm\ngAAAX4BAAGCAAABogAEAaYABAGqAAABrgAAAbIAAAG2AAABhgDsAgIADAGKABwBwgAQAXoA/AIGA\nBABdgDsAfYADAH6AAAB/gAAAdoABAHeAAAB4gAAAeYAAAHqAAAB7gAEAfIAAAIKAAACGgAUAg4AB\nAIeABgCEgAIAiIAHAIWAAwCJgAgAioAAAJqAAACqgAAAi4AAAJuAAACrgAAAjIAAAJyAAACsgAAA\njYAAAJ2AAACtgAAAjoAAAJ6AAACugAAAj4AAAJ+AAACvgAAAkIAAAKCAAACwgAAAkYAAAKGAAACx\ngAAAkoAAAKKAAACygAAAk4AAAKOAAACzgAAAlIAAAKSAAAC0gAAAlYAAAKWAAAC1gAAAloAAAKaA\nAAC2gAAAl4AAAKeAAAC3gAAAmIAAAKiAAAC4gAAAmYAAAKmAAAC5gAAAwIABALqAAAC7gAEAvIAC\nAL2AAwC+gAQAv4ABANaAAgDJgAEAyoABAMuAAQDBgAgAwoAQAMOACADEgAgA14D//9iAfwDZgAAA\n2oAAAMWAAQDGgAIAx4AAAMiAAQDMgAAAzYABAM+ACADOgAAA0IAAANGAAgDTgAgA0oAQANSAAQDV\ngAEA24AAANyAEADdgDwA3oA8AN+AAgDggMAD4YAAAOOAAQDigAIAAoD/A1WAEwBWgD8BV4ADAB2A\nAgAAgFgBHIAIABuABgAEgP8DBYAAABCA/wEGgAACEYD/AweAAAQSgP8FCIAABhOA/wcJgAAIFID/\nCQqAAAoVgP8LC4AADBaA/w0MgAAOF4D/DzSA/xU/gAAQNYD/G0CAABY2gP8hQYAAHDeA/ydCgAAi\nOID/LUOAACg5gP8zRIAALjqA/zlFgAA0O4D/P0aAADpKgP8FS4D/BUyA/wVNgP8FToD/BU+A/wVQ\ngP8FUYD/BR6A/wEpgAAAH4D/AyqAAAIggP8FK4AABCGA/wcsgAAGIoD/CS2AAAgjgP8LLoAACiSA\n/w0vgAAMJYD/DzCAAA4DgP8DWIABAAAAAAAAAAAAAAAAAAAABQAAAAUAAAAFAAAABQAAAAUAAAAF\nAAAABQAAAAUAAAAFAAAABQAAAAUAAAAFAAAABQAAAAUAAAAFAAAABQBJEkkSSRJJEkkSSRJJEkkS\nSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJ\nEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkS\nSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSSRJJEkkSAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA\nAAAAAAA=\n"
      2:
        layer_name: l2_conv_l2_bias_l2_relu_l2_pool
        layer_index: 2
        op: fused_conv2d_bias_relu_pool_singlepass
        device: elt
        elt_config:
          pass_idx:
            0:
              spu_num_rows: 30
              spu_num_columns: 30
              spu_num_channels: 0
              mae_kernel_size_horizontal: 2
              mae_kernel_size_vertical: 2
              composed_kernel_size_horizontal: 5
              composed_kernel_size_horizontal_one_based: 6
              composed_kernel_size_vertical: 2
              composed_kernel_size_vertical_one_based: 3
              composed_kernel_coeff: 2
              spu_num_channels_one_based: 1
              spu_min_filter_threshold: 0
              spu_enable_min_filter: 0
              spu_max_filter_threshold: 0
              spu_enable_max_filter: 0
              spu_decode_stream_length: 31
              vertical_stride: 1
              horizontal_stride: 1
              padding_left: 0
              padding_right: 0
              padding_bottom: 0
              padding_top: 0
              spu_num_output_rows: 28
              num_parallel_conv_output_rows: 3
              spu_num_parallel_read_rows: 5
              mae_kernel_size_horizontal_minus_padding_left: 2
              spu_num_columns_plus_padding_right: 30
              num_parallel_conv_output_rows_one_based: 4
              spu_num_columns_minus_mae_kernel_size: 28
              ada_tier1_mode: 3
              ada_tier2_modes: 1
              ada_tier2_threshold_enable: 1
              ada_tier2_threshold: 0
              lwg_kag_range_start_0: 0
              lwg_kag_range_end_0: 3
              lwg_kag_range_start_1: 1
              lwg_kag_range_end_1: 4
              lwg_kag_range_start_2: 2
              lwg_kag_range_end_2: 5
              lwg_kag_range_start_3: 3
              lwg_kag_range_end_3: 6
              lwg_compr_sign_enabled_0: 0
              lwg_compr_offset_enabled_0: 0
              lwg_compr_per_row_overhead_size_0: 0
              lwg_compr_sign_enabled_1: 0
              lwg_compr_offset_enabled_1: 0
              lwg_compr_per_row_overhead_size_1: 0
              lwg_compr_sign_enabled_2: 0
              lwg_compr_offset_enabled_2: 0
              lwg_compr_per_row_overhead_size_2: 0
              lwg_compr_sign_enabled_3: 0
              lwg_compr_offset_enabled_3: 0
              lwg_compr_per_row_overhead_size_3: 0
              lwg_compr_sign_enabled_4: 0
              lwg_compr_offset_enabled_4: 0
              lwg_compr_per_row_overhead_size_4: 0
              lwg_compr_sign_enabled_5: 0
              lwg_compr_offset_enabled_5: 0
              lwg_compr_per_row_overhead_size_5: 0
              lwg_compr_sign_enabled_6: 0
              lwg_compr_offset_enabled_6: 0
              lwg_compr_per_row_overhead_size_6: 0
              lwg_compr_sign_enabled_7: 0
              lwg_compr_offset_enabled_7: 0
              lwg_compr_per_row_overhead_size_7: 0
              lwg_compr_sign_enabled_8: 0
              lwg_compr_offset_enabled_8: 0
              lwg_compr_per_row_overhead_size_8: 0
              lwg_compr_sign_enabled_9: 0
              lwg_compr_offset_enabled_9: 0
              lwg_compr_per_row_overhead_size_9: 0
              lwg_compr_sign_enabled_10: 0
              lwg_compr_offset_enabled_10: 0
              lwg_compr_per_row_overhead_size_10: 0
              lwg_compr_sign_enabled_11: 0
              lwg_compr_offset_enabled_11: 0
              lwg_compr_per_row_overhead_size_11: 0
              lwg_compr_sign_enabled_12: 0
              lwg_compr_offset_enabled_12: 0
              lwg_compr_per_row_overhead_size_12: 0
              lwg_compr_sign_enabled_13: 0
              lwg_compr_offset_enabled_13: 0
              lwg_compr_per_row_overhead_size_13: 0
              lwg_compr_sign_enabled_14: 0
              lwg_compr_offset_enabled_14: 0
              lwg_compr_per_row_overhead_size_14: 0
              lwg_compr_sign_enabled_15: 0
              lwg_compr_offset_enabled_15: 0
              lwg_compr_per_row_overhead_size_15: 0
              cwg_num_flushes_per_fence: 2
              cwg_cp_step_incr_0: 0
              cwg_cp_step_incr_1: 1
              cwg_cp_step_incr_2: 2
              cwg_cp_step_incr_3: 3
              cwg_cp_step_incr_4: 4
              cwg_acc_step_incr: 1
              bias_memory_max_read_ptr: 4
              wpp_row_pool_op: 1
              wpp_mac_merge_op: 1
              wpp_col_pool_op: 1
              wpp_num_merged_lwg: 8
              wpp_num_active_lwg: 16
              wpp_truncate_start_bit: 8
              wpp_biases_shift: 8
              wpp_truncate_saturation_max: 8388607
              wpp_truncate_saturation_min: 0
              wpp_row_pool_mode: 1
              wpp_row_pool_mode_incr: 2
              wpp_row_merge_mode: 0
              wpp_row_merge_mode_incr: 1
              wpp_mac_merge_mode: 0
              wpp_mac_merge_mode_incr: 1
              wpp_mac_merge_num_valid: 8
              wpp_mac_merge_iter: 0
              wpp_col_pool_iter: 0
              wpp_cwr_mode: 2
              wpp_cwr_max_memory_ptr: 8
              wpp_cwr_out_bank_mod: 16
              wpp_col_pool_normalize: 1
              wpp_row_pool_normalize: 1
              wpp_rwr_input_counter_max: 0
              wpp_rwr_ch_counter_max: 16
              wpp_rwr_col_counter_max: 29
              wpp_rwr_row_counter_max: 29
              wpp_rwr_row_counter_increase: 2
              wpp_compressed_stream_max_limit: 464
              enable_sm_compression: 1
              wpp_id_counter_increase: 2
              isw_burst_size: 1023
              mkw_num_bal_trx: 191
              mkw_num_wem_trx: 3071
              mkw_num_bias_trx: 7
              pow_num_active_fsm: 2
              isw_num_mkw_trx: 3272
              pir_num_active_stream: 6
              pow_num_active_stream: 6
              osr_burst_size: 1023
              osr_stream_start_address_0: 0
              osr_stream_end_address_0: 681
              osr_stream_start_address_1: 682
              osr_stream_end_address_1: 1364
              osr_stream_start_address_2: 1365
              osr_stream_end_address_2: 2047
              osr_stream_start_address_3: 2048
              osr_stream_end_address_3: 2729
              osr_stream_start_address_4: 2730
              osr_stream_end_address_4: 3412
              osr_stream_start_address_5: 3413
              osr_stream_end_address_5: 4095
              slb_in_stream_end_address_0: 6143
              slb_in_stream_start_address_0: 4096
              slb_in_stream_end_address_1: 8191
              slb_in_stream_start_address_1: 6144
              slb_in_stream_end_address_2: 10239
              slb_in_stream_start_address_2: 8192
              slb_in_stream_end_address_3: 12287
              slb_in_stream_start_address_3: 10240
              slb_in_stream_end_address_4: 14335
              slb_in_stream_start_address_4: 12288
              slb_in_stream_end_address_5: 16383
              slb_in_stream_start_address_5: 14336
              slb_in_stream_num_entries_0: 2047
              slb_in_stream_num_entries_1: 2047
              slb_in_stream_num_entries_2: 2047
              slb_in_stream_num_entries_3: 2047
              slb_in_stream_num_entries_4: 2047
              slb_in_stream_num_entries_5: 2047
              slb_out_stream_end_address_0: 681
              slb_out_stream_start_address_0: 0
              slb_out_stream_end_address_1: 1364
              slb_out_stream_start_address_1: 682
              slb_out_stream_end_address_2: 2047
              slb_out_stream_start_address_2: 1365
              slb_out_stream_end_address_3: 2729
              slb_out_stream_start_address_3: 2048
              slb_out_stream_end_address_4: 3412
              slb_out_stream_start_address_4: 2730
              slb_out_stream_end_address_5: 4095
              slb_out_stream_start_address_5: 3413
              isw_discard_trigger: 1023
              spu_sparse_matrix_mode: 1
        cpu_config:
          num_input_streams: 6
          num_output_streams: 6
          num_pass: 1
          input_burst_size: 1024
          output_burst_size: 1024
          config_burst_size: 1024
        data:
          pass_idx:
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      3:
        layer_name: l3_conv_l3_bias_l3_relu_l3_pool
        layer_index: 3
        op: fused_conv2d_bias_relu_pool_singlepass
        device: elt
        elt_config:
          pass_idx:
            0:
              spu_num_rows: 14
              spu_num_columns: 14
              spu_num_channels: 0
              mae_kernel_size_horizontal: 2
              mae_kernel_size_vertical: 2
              composed_kernel_size_horizontal: 5
              composed_kernel_size_horizontal_one_based: 6
              composed_kernel_size_vertical: 2
              composed_kernel_size_vertical_one_based: 3
              composed_kernel_coeff: 2
              spu_num_channels_one_based: 1
              spu_min_filter_threshold: 0
              spu_enable_min_filter: 0
              spu_max_filter_threshold: 0
              spu_enable_max_filter: 0
              spu_decode_stream_length: 15
              vertical_stride: 1
              horizontal_stride: 1
              padding_left: 0
              padding_right: 0
              padding_bottom: 0
              padding_top: 0
              spu_num_output_rows: 12
              num_parallel_conv_output_rows: 3
              spu_num_parallel_read_rows: 5
              mae_kernel_size_horizontal_minus_padding_left: 2
              spu_num_columns_plus_padding_right: 14
              num_parallel_conv_output_rows_one_based: 4
              spu_num_columns_minus_mae_kernel_size: 12
              ada_tier1_mode: 2
              ada_tier2_modes: 1
              ada_tier2_threshold_enable: 1
              ada_tier2_threshold: 0
              lwg_kag_range_start_0: 0
              lwg_kag_range_end_0: 3
              lwg_kag_range_start_1: 1
              lwg_kag_range_end_1: 4
              lwg_kag_range_start_2: 2
              lwg_kag_range_end_2: 5
              lwg_kag_range_start_3: 3
              lwg_kag_range_end_3: 6
              lwg_compr_sign_enabled_0: 0
              lwg_compr_offset_enabled_0: 0
              lwg_compr_per_row_overhead_size_0: 0
              lwg_compr_sign_enabled_1: 0
              lwg_compr_offset_enabled_1: 0
              lwg_compr_per_row_overhead_size_1: 0
              lwg_compr_sign_enabled_2: 0
              lwg_compr_offset_enabled_2: 0
              lwg_compr_per_row_overhead_size_2: 0
              lwg_compr_sign_enabled_3: 0
              lwg_compr_offset_enabled_3: 0
              lwg_compr_per_row_overhead_size_3: 0
              lwg_compr_sign_enabled_4: 0
              lwg_compr_offset_enabled_4: 0
              lwg_compr_per_row_overhead_size_4: 0
              lwg_compr_sign_enabled_5: 0
              lwg_compr_offset_enabled_5: 0
              lwg_compr_per_row_overhead_size_5: 0
              lwg_compr_sign_enabled_6: 0
              lwg_compr_offset_enabled_6: 0
              lwg_compr_per_row_overhead_size_6: 0
              lwg_compr_sign_enabled_7: 0
              lwg_compr_offset_enabled_7: 0
              lwg_compr_per_row_overhead_size_7: 0
              lwg_compr_sign_enabled_8: 0
              lwg_compr_offset_enabled_8: 0
              lwg_compr_per_row_overhead_size_8: 0
              lwg_compr_sign_enabled_9: 0
              lwg_compr_offset_enabled_9: 0
              lwg_compr_per_row_overhead_size_9: 0
              lwg_compr_sign_enabled_10: 0
              lwg_compr_offset_enabled_10: 0
              lwg_compr_per_row_overhead_size_10: 0
              lwg_compr_sign_enabled_11: 0
              lwg_compr_offset_enabled_11: 0
              lwg_compr_per_row_overhead_size_11: 0
              lwg_compr_sign_enabled_12: 0
              lwg_compr_offset_enabled_12: 0
              lwg_compr_per_row_overhead_size_12: 0
              lwg_compr_sign_enabled_13: 0
              lwg_compr_offset_enabled_13: 0
              lwg_compr_per_row_overhead_size_13: 0
              lwg_compr_sign_enabled_14: 0
              lwg_compr_offset_enabled_14: 0
              lwg_compr_per_row_overhead_size_14: 0
              lwg_compr_sign_enabled_15: 0
              lwg_compr_offset_enabled_15: 0
              lwg_compr_per_row_overhead_size_15: 0
              cwg_num_flushes_per_fence: 2
              cwg_cp_step_incr_0: 0
              cwg_cp_step_incr_1: 1
              cwg_cp_step_incr_2: 2
              cwg_cp_step_incr_3: 3
              cwg_cp_step_incr_4: 4
              cwg_acc_step_incr: 1
              bias_memory_max_read_ptr: 8
              wpp_row_pool_op: 1
              wpp_mac_merge_op: 1
              wpp_col_pool_op: 1
              wpp_num_merged_lwg: 4
              wpp_num_active_lwg: 16
              wpp_truncate_start_bit: 8
              wpp_biases_shift: 8
              wpp_truncate_saturation_max: 8388607
              wpp_truncate_saturation_min: 0
              wpp_row_pool_mode: 1
              wpp_row_pool_mode_incr: 2
              wpp_row_merge_mode: 0
              wpp_row_merge_mode_incr: 1
              wpp_mac_merge_mode: 0
              wpp_mac_merge_mode_incr: 1
              wpp_mac_merge_num_valid: 8
              wpp_mac_merge_iter: 0
              wpp_col_pool_iter: 0
              wpp_cwr_mode: 2
              wpp_cwr_max_memory_ptr: 24
              wpp_cwr_out_bank_mod: 16
              wpp_col_pool_normalize: 1
              wpp_row_pool_normalize: 1
              wpp_rwr_input_counter_max: 0
              wpp_rwr_ch_counter_max: 32
              wpp_rwr_col_counter_max: 13
              wpp_rwr_row_counter_max: 13
              wpp_rwr_row_counter_increase: 2
              wpp_compressed_stream_max_limit: 432
              enable_sm_compression: 1
              wpp_id_counter_increase: 2
              isw_burst_size: 1023
              mkw_num_bal_trx: 383
              mkw_num_wem_trx: 6143
              mkw_num_bias_trx: 15
              pow_num_active_fsm: 2
              isw_num_mkw_trx: 6544
              pir_num_active_stream: 6
              pow_num_active_stream: 6
              osr_burst_size: 1023
              osr_stream_start_address_0: 0
              osr_stream_end_address_0: 681
              osr_stream_start_address_1: 682
              osr_stream_end_address_1: 1364
              osr_stream_start_address_2: 1365
              osr_stream_end_address_2: 2047
              osr_stream_start_address_3: 2048
              osr_stream_end_address_3: 2729
              osr_stream_start_address_4: 2730
              osr_stream_end_address_4: 3412
              osr_stream_start_address_5: 3413
              osr_stream_end_address_5: 4095
              slb_in_stream_end_address_0: 6143
              slb_in_stream_start_address_0: 4096
              slb_in_stream_end_address_1: 8191
              slb_in_stream_start_address_1: 6144
              slb_in_stream_end_address_2: 10239
              slb_in_stream_start_address_2: 8192
              slb_in_stream_end_address_3: 12287
              slb_in_stream_start_address_3: 10240
              slb_in_stream_end_address_4: 14335
              slb_in_stream_start_address_4: 12288
              slb_in_stream_end_address_5: 16383
              slb_in_stream_start_address_5: 14336
              slb_in_stream_num_entries_0: 2047
              slb_in_stream_num_entries_1: 2047
              slb_in_stream_num_entries_2: 2047
              slb_in_stream_num_entries_3: 2047
              slb_in_stream_num_entries_4: 2047
              slb_in_stream_num_entries_5: 2047
              slb_out_stream_end_address_0: 681
              slb_out_stream_start_address_0: 0
              slb_out_stream_end_address_1: 1364
              slb_out_stream_start_address_1: 682
              slb_out_stream_end_address_2: 2047
              slb_out_stream_start_address_2: 1365
              slb_out_stream_end_address_3: 2729
              slb_out_stream_start_address_3: 2048
              slb_out_stream_end_address_4: 3412
              slb_out_stream_start_address_4: 2730
              slb_out_stream_end_address_5: 4095
              slb_out_stream_start_address_5: 3413
              isw_discard_trigger: 1023
              spu_sparse_matrix_mode: 1
        cpu_config:
          num_input_streams: 6
          num_output_streams: 6
          num_pass: 1
          input_burst_size: 1024
          output_burst_size: 1024
          config_burst_size: 1024
        data:
          pass_idx:
            0: !<tag:yaml.org,2002:binary> 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FVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFAAAAAAAAAAAAAAAA\nAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA\nAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA\nAAA=\n"
      4:
        layer_name: l4_conv_l4_bias_l4_relu_l4_pool
        layer_index: 4
        op: fused_conv2d_bias_relu_pool_singlepass
        device: elt
        elt_config:
          pass_idx:
            0:
              spu_num_rows: 6
              spu_num_columns: 6
              spu_num_channels: 0
              mae_kernel_size_horizontal: 2
              mae_kernel_size_vertical: 2
              composed_kernel_size_horizontal: 5
              composed_kernel_size_horizontal_one_based: 6
              composed_kernel_size_vertical: 2
              composed_kernel_size_vertical_one_based: 3
              composed_kernel_coeff: 2
              spu_num_channels_one_based: 1
              spu_min_filter_threshold: 0
              spu_enable_min_filter: 0
              spu_max_filter_threshold: 0
              spu_enable_max_filter: 0
              spu_decode_stream_length: 7
              vertical_stride: 1
              horizontal_stride: 1
              padding_left: 0
              padding_right: 0
              padding_bottom: 0
              padding_top: 0
              spu_num_output_rows: 4
              num_parallel_conv_output_rows: 3
              spu_num_parallel_read_rows: 5
              mae_kernel_size_horizontal_minus_padding_left: 2
              spu_num_columns_plus_padding_right: 6
              num_parallel_conv_output_rows_one_based: 4
              spu_num_columns_minus_mae_kernel_size: 4
              ada_tier1_mode: 1
              ada_tier2_modes: 1
              ada_tier2_threshold_enable: 1
              ada_tier2_threshold: 0
              lwg_kag_range_start_0: 0
              lwg_kag_range_end_0: 3
              lwg_kag_range_start_1: 1
              lwg_kag_range_end_1: 4
              lwg_kag_range_start_2: 2
              lwg_kag_range_end_2: 5
              lwg_kag_range_start_3: 3
              lwg_kag_range_end_3: 6
              lwg_compr_sign_enabled_0: 0
              lwg_compr_offset_enabled_0: 0
              lwg_compr_per_row_overhead_size_0: 0
              lwg_compr_sign_enabled_1: 0
              lwg_compr_offset_enabled_1: 0
              lwg_compr_per_row_overhead_size_1: 0
              lwg_compr_sign_enabled_2: 0
              lwg_compr_offset_enabled_2: 0
              lwg_compr_per_row_overhead_size_2: 0
              lwg_compr_sign_enabled_3: 0
              lwg_compr_offset_enabled_3: 0
              lwg_compr_per_row_overhead_size_3: 0
              lwg_compr_sign_enabled_4: 0
              lwg_compr_offset_enabled_4: 0
              lwg_compr_per_row_overhead_size_4: 0
              lwg_compr_sign_enabled_5: 0
              lwg_compr_offset_enabled_5: 0
              lwg_compr_per_row_overhead_size_5: 0
              lwg_compr_sign_enabled_6: 0
              lwg_compr_offset_enabled_6: 0
              lwg_compr_per_row_overhead_size_6: 0
              lwg_compr_sign_enabled_7: 0
              lwg_compr_offset_enabled_7: 0
              lwg_compr_per_row_overhead_size_7: 0
              lwg_compr_sign_enabled_8: 0
              lwg_compr_offset_enabled_8: 0
              lwg_compr_per_row_overhead_size_8: 0
              lwg_compr_sign_enabled_9: 0
              lwg_compr_offset_enabled_9: 0
              lwg_compr_per_row_overhead_size_9: 0
              lwg_compr_sign_enabled_10: 0
              lwg_compr_offset_enabled_10: 0
              lwg_compr_per_row_overhead_size_10: 0
              lwg_compr_sign_enabled_11: 0
              lwg_compr_offset_enabled_11: 0
              lwg_compr_per_row_overhead_size_11: 0
              lwg_compr_sign_enabled_12: 0
              lwg_compr_offset_enabled_12: 0
              lwg_compr_per_row_overhead_size_12: 0
              lwg_compr_sign_enabled_13: 0
              lwg_compr_offset_enabled_13: 0
              lwg_compr_per_row_overhead_size_13: 0
              lwg_compr_sign_enabled_14: 0
              lwg_compr_offset_enabled_14: 0
              lwg_compr_per_row_overhead_size_14: 0
              lwg_compr_sign_enabled_15: 0
              lwg_compr_offset_enabled_15: 0
              lwg_compr_per_row_overhead_size_15: 0
              cwg_num_flushes_per_fence: 2
              cwg_cp_step_incr_0: 0
              cwg_cp_step_incr_1: 1
              cwg_cp_step_incr_2: 2
              cwg_cp_step_incr_3: 3
              cwg_cp_step_incr_4: 4
              cwg_acc_step_incr: 1
              bias_memory_max_read_ptr: 16
              wpp_row_pool_op: 1
              wpp_mac_merge_op: 1
              wpp_col_pool_op: 1
              wpp_num_merged_lwg: 2
              wpp_num_active_lwg: 16
              wpp_truncate_start_bit: 8
              wpp_biases_shift: 8
              wpp_truncate_saturation_max: 8388607
              wpp_truncate_saturation_min: 0
              wpp_row_pool_mode: 1
              wpp_row_pool_mode_incr: 2
              wpp_row_merge_mode: 0
              wpp_row_merge_mode_incr: 1
              wpp_mac_merge_mode: 0
              wpp_mac_merge_mode_incr: 1
              wpp_mac_merge_num_valid: 8
              wpp_mac_merge_iter: 0
              wpp_col_pool_iter: 0
              wpp_cwr_mode: 2
              wpp_cwr_max_memory_ptr: 56
              wpp_cwr_out_bank_mod: 16
              wpp_col_pool_normalize: 1
              wpp_row_pool_normalize: 1
              wpp_rwr_input_counter_max: 0
              wpp_rwr_ch_counter_max: 64
              wpp_rwr_col_counter_max: 5
              wpp_rwr_row_counter_max: 5
              wpp_rwr_row_counter_increase: 2
              wpp_compressed_stream_max_limit: 368
              enable_sm_compression: 1
              wpp_id_counter_increase: 2
              isw_burst_size: 1023
              mkw_num_bal_trx: 767
              mkw_num_wem_trx: 12287
              mkw_num_bias_trx: 31
              pow_num_active_fsm: 2
              isw_num_mkw_trx: 13088
              pir_num_active_stream: 6
              pow_num_active_stream: 2
              osr_burst_size: 1023
              osr_stream_start_address_0: 0
              osr_stream_end_address_0: 681
              osr_stream_start_address_1: 682
              osr_stream_end_address_1: 1364
              osr_stream_start_address_2: 1365
              osr_stream_end_address_2: 2047
              osr_stream_start_address_3: 2048
              osr_stream_end_address_3: 2729
              osr_stream_start_address_4: 2730
              osr_stream_end_address_4: 3412
              osr_stream_start_address_5: 3413
              osr_stream_end_address_5: 4095
              slb_in_stream_end_address_0: 6143
              slb_in_stream_start_address_0: 4096
              slb_in_stream_end_address_1: 8191
              slb_in_stream_start_address_1: 6144
              slb_in_stream_end_address_2: 10239
              slb_in_stream_start_address_2: 8192
              slb_in_stream_end_address_3: 12287
              slb_in_stream_start_address_3: 10240
              slb_in_stream_end_address_4: 14335
              slb_in_stream_start_address_4: 12288
              slb_in_stream_end_address_5: 16383
              slb_in_stream_start_address_5: 14336
              slb_in_stream_num_entries_0: 2047
              slb_in_stream_num_entries_1: 2047
              slb_in_stream_num_entries_2: 2047
              slb_in_stream_num_entries_3: 2047
              slb_in_stream_num_entries_4: 2047
              slb_in_stream_num_entries_5: 2047
              slb_out_stream_end_address_0: 681
              slb_out_stream_start_address_0: 0
              slb_out_stream_end_address_1: 1364
              slb_out_stream_start_address_1: 682
              slb_out_stream_end_address_2: 2047
              slb_out_stream_start_address_2: 1365
              slb_out_stream_end_address_3: 2729
              slb_out_stream_start_address_3: 2048
              slb_out_stream_end_address_4: 3412
              slb_out_stream_start_address_4: 2730
              slb_out_stream_end_address_5: 4095
              slb_out_stream_start_address_5: 3413
              isw_discard_trigger: 1023
              spu_sparse_matrix_mode: 1
        cpu_config:
          num_input_streams: 6
          num_output_streams: 2
          num_pass: 1
          input_burst_size: 1024
          output_burst_size: 1024
          config_burst_size: 1024
        data:
          pass_idx:
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FVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUF\nVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVVBVUFVQVV\nBVUFVQVVBQAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA\nAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA\nAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA\nAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA\nAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA=\n"
      5:
        layer_name: l4_conv_l4_bias_l4_relu_l4_pool
        layer_index: 5
        op: fused_conv2d_bias_relu_pool_singlepass
        device: elt
        elt_config:
          pass_idx:
            0:
              spu_num_rows: 2
              spu_num_columns: 2
              spu_num_channels: 0
              mae_kernel_size_horizontal: 0
              mae_kernel_size_vertical: 0
              composed_kernel_size_horizontal: 7
              composed_kernel_size_horizontal_one_based: 8
              composed_kernel_size_vertical: 0
              composed_kernel_size_vertical_one_based: 1
              composed_kernel_coeff: 8
              spu_num_channels_one_based: 1
              spu_min_filter_threshold: 0
              spu_enable_min_filter: 0
              spu_max_filter_threshold: 0
              spu_enable_max_filter: 0
              spu_decode_stream_length: 3
              vertical_stride: 1
              horizontal_stride: 1
              padding_left: 0
              padding_right: 0
              padding_bottom: 0
              padding_top: 0
              spu_num_output_rows: 2
              num_parallel_conv_output_rows: 1
              spu_num_parallel_read_rows: 1
              mae_kernel_size_horizontal_minus_padding_left: 0
              spu_num_columns_plus_padding_right: 2
              num_parallel_conv_output_rows_one_based: 2
              spu_num_columns_minus_mae_kernel_size: 2
              ada_tier1_mode: 3
              ada_tier2_modes: 1
              ada_tier2_threshold_enable: 1
              ada_tier2_threshold: 0
              lwg_kag_range_start_0: 0
              lwg_kag_range_end_0: 1
              lwg_kag_range_start_1: 1
              lwg_kag_range_end_1: 2
              lwg_kag_range_start_2: 2
              lwg_kag_range_end_2: 3
              lwg_kag_range_start_3: 3
              lwg_kag_range_end_3: 4
              lwg_compr_sign_enabled_0: 0
              lwg_compr_offset_enabled_0: 0
              lwg_compr_per_row_overhead_size_0: 0
              lwg_compr_sign_enabled_1: 0
              lwg_compr_offset_enabled_1: 0
              lwg_compr_per_row_overhead_size_1: 0
              lwg_compr_sign_enabled_2: 0
              lwg_compr_offset_enabled_2: 0
              lwg_compr_per_row_overhead_size_2: 0
              lwg_compr_sign_enabled_3: 0
              lwg_compr_offset_enabled_3: 0
              lwg_compr_per_row_overhead_size_3: 0
              lwg_compr_sign_enabled_4: 0
              lwg_compr_offset_enabled_4: 0
              lwg_compr_per_row_overhead_size_4: 0
              lwg_compr_sign_enabled_5: 0
              lwg_compr_offset_enabled_5: 0
              lwg_compr_per_row_overhead_size_5: 0
              lwg_compr_sign_enabled_6: 0
              lwg_compr_offset_enabled_6: 0
              lwg_compr_per_row_overhead_size_6: 0
              lwg_compr_sign_enabled_7: 0
              lwg_compr_offset_enabled_7: 0
              lwg_compr_per_row_overhead_size_7: 0
              lwg_compr_sign_enabled_8: 0
              lwg_compr_offset_enabled_8: 0
              lwg_compr_per_row_overhead_size_8: 0
              lwg_compr_sign_enabled_9: 0
              lwg_compr_offset_enabled_9: 0
              lwg_compr_per_row_overhead_size_9: 0
              lwg_compr_sign_enabled_10: 0
              lwg_compr_offset_enabled_10: 0
              lwg_compr_per_row_overhead_size_10: 0
              lwg_compr_sign_enabled_11: 0
              lwg_compr_offset_enabled_11: 0
              lwg_compr_per_row_overhead_size_11: 0
              lwg_compr_sign_enabled_12: 0
              lwg_compr_offset_enabled_12: 0
              lwg_compr_per_row_overhead_size_12: 0
              lwg_compr_sign_enabled_13: 0
              lwg_compr_offset_enabled_13: 0
              lwg_compr_per_row_overhead_size_13: 0
              lwg_compr_sign_enabled_14: 0
              lwg_compr_offset_enabled_14: 0
              lwg_compr_per_row_overhead_size_14: 0
              lwg_compr_sign_enabled_15: 0
              lwg_compr_offset_enabled_15: 0
              lwg_compr_per_row_overhead_size_15: 0
              cwg_num_flushes_per_fence: 8
              cwg_cp_step_incr_0: 0
              cwg_cp_step_incr_1: 1
              cwg_cp_step_incr_2: 2
              cwg_cp_step_incr_3: 3
              cwg_cp_step_incr_4: 4
              cwg_acc_step_incr: 1
              bias_memory_max_read_ptr: 16
              wpp_row_pool_op: 1
              wpp_mac_merge_op: 1
              wpp_col_pool_op: 1
              wpp_num_merged_lwg: 8
              wpp_num_active_lwg: 16
              wpp_truncate_start_bit: 8
              wpp_biases_shift: 8
              wpp_truncate_saturation_max: 8388607
              wpp_truncate_saturation_min: 0
              wpp_row_pool_mode: 1
              wpp_row_pool_mode_incr: 2
              wpp_row_merge_mode: 1
              wpp_row_merge_mode_incr: 2
              wpp_mac_merge_mode: 0
              wpp_mac_merge_mode_incr: 1
              wpp_mac_merge_num_valid: 8
              wpp_mac_merge_iter: 0
              wpp_col_pool_iter: 0
              wpp_cwr_mode: 2
              wpp_cwr_max_memory_ptr: 8
              wpp_cwr_out_bank_mod: 16
              wpp_col_pool_normalize: 1
              wpp_row_pool_normalize: 1
              wpp_rwr_input_counter_max: 0
              wpp_rwr_ch_counter_max: 16
              wpp_rwr_col_counter_max: 3
              wpp_rwr_row_counter_max: 3
              wpp_rwr_row_counter_increase: 1
              wpp_compressed_stream_max_limit: 62
              enable_sm_compression: 1
              wpp_id_counter_increase: 1
              isw_burst_size: 1023
              mkw_num_bal_trx: 511
              mkw_num_wem_trx: 8191
              mkw_num_bias_trx: 31
              pow_num_active_fsm: 1
              isw_num_mkw_trx: 8736
              pir_num_active_stream: 2
              pow_num_active_stream: 1
              osr_burst_size: 1023
              osr_stream_start_address_0: 0
              osr_stream_end_address_0: 2047
              osr_stream_start_address_1: 2048
              osr_stream_end_address_1: 4095
              slb_in_stream_end_address_0: 10239
              slb_in_stream_start_address_0: 4096
              slb_in_stream_end_address_1: 16383
              slb_in_stream_start_address_1: 10240
              slb_in_stream_num_entries_0: 6143
              slb_in_stream_num_entries_1: 6143
              slb_out_stream_end_address_0: 2047
              slb_out_stream_start_address_0: 0
              slb_out_stream_end_address_1: 4095
              slb_out_stream_start_address_1: 2048
              isw_discard_trigger: 1023
              spu_sparse_matrix_mode: 1
        cpu_config:
          num_input_streams: 2
          num_output_streams: 1
          num_pass: 1
          input_burst_size: 1024
          output_burst_size: 1024
          config_burst_size: 1024
        data:
          pass_idx:
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alessandroaimar commented 6 years ago

solved adding -shared flag in compile