JTAG test intermittently fails with incorrect value

[jbush001]

jtag_inject
assert_equal failed, expected 3937934905 got 0

From the trace:

Sending JTAG command 0x5 data 0x0
received JTAG response 0x0

[jbush001]

There is a race condition. In the cycle the debug unit asserts its halt, the instruction fetch tag stage requests an instruction. The next cycle, the instruction fetch data logic sees a valid instruction and attempts to issue to the next stage:

            ifd_instruction_valid <= (ift_instruction_requested && !rollback_this_stage
                && cache_hit && ift_tlb_hit && !alignment_fault)
                || (dbg_instruction_inject_en && core_selected_debug);

However, the mux is now pulling an instruction from the debug unit, which is some uninitialized garbage value:

    assign ifd_instruction = dbg_halt
        ? dbg_instruction_inject
        : {fetched_word[7:0], fetched_word[15:8], fetched_word[23:16], fetched_word[31:24]};

This is a multi-cycle vector load, which eventually hangs because the jtag unit can't restart the instruction.

[jbush001]

Tested this by running JTAG test 100 times in a row. Didn't see the failure (which was fairly common before).