jbush001
commented
6 years ago This would probably be a variant of the MOVHI instruction, but instead of moving the immediate into the upper 19 bits, it would add the immediate to the upper 19 bits of the program counter.
However, with 19 bits, we can only access addresses on a 8k granularity. Since the system aligns segments on 4k hardware page boundaries, this would require two instructions to load the BSS. Need to find an instruction encoding that can cram in 20 bits, which would only require one instruction. Revising the instruction encoding would make this easier.
RISC-V uses an instruction that adds 20 bits to the upper portion of the current PC. This is useful for efficiently loading the address of the GOT table in a function prolog for position independent code.