jbush001
commented
6 years ago - The logic to bypass peripheral register writes is kind of messy inside the processor. It would be a lot cleaner to leave these alone and route the signals internally.
- From a programming perspective, it seems a lot cleaner to have control registers interface with things inside the core and the memory mapped register space interface with things outside it.
- Having these in memory mapped registers imposes a constraint on how external peripherals are mapped, which limits flexibility.
Currently, there is one performance counter module shared by all cores. One impact of this change is that it would probably end up being easier to have a performance counter module per core (since otherwise there would need to be a mechanism to deal with contention when multiple cores try to access performance counter registers). From a programming perspective, I think this is fine (and perhaps preferable).
Currently these are exposed as memory mapped registers, but should be control registers.