I'm trying to compile your SDRAM core with IUS simulator. However, it fails on sim_sdram.sv, giving the following errors:
sim_sdram.sv,144|12): Multiple drivers to always_ff output variable mode_register_ff detected
sim_sdram.sv,207|12): Multiple drivers to always_ff output variable refresh_delay detected
sim_sdram.sv,176|12): Multiple drivers to always_ff output variable burst_w detected
sim_sdram.sv,168|12): Multiple drivers to always_ff output variable burst_active detected
sim_sdram.sv,95|12): Multiple drivers to always_ff output variable burst_count_ff detected
And few more signals
That normally happens when you mix bus initialization with combinatorial and sequential assignments. Or use those in always_ff blocks and initially init, like logic [7:0] burst_count_ff = '0;
Pls put all them in a single sequential block
Boris
Hi Jeff
I'm trying to compile your SDRAM core with IUS simulator. However, it fails on sim_sdram.sv, giving the following errors: sim_sdram.sv,144|12): Multiple drivers to always_ff output variable mode_register_ff detected sim_sdram.sv,207|12): Multiple drivers to always_ff output variable refresh_delay detected sim_sdram.sv,176|12): Multiple drivers to always_ff output variable burst_w detected sim_sdram.sv,168|12): Multiple drivers to always_ff output variable burst_active detected sim_sdram.sv,95|12): Multiple drivers to always_ff output variable burst_count_ff detected And few more signals
That normally happens when you mix bus initialization with combinatorial and sequential assignments. Or use those in always_ff blocks and initially init, like logic [7:0] burst_count_ff = '0;
Pls put all them in a single sequential block Boris