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jbush001 / NyuziProcessor

GPGPU microprocessor architecture
Apache License 2.0
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Results requiring normalization shift rounded incorrectly #58

Open jbush001 opened 7 years ago

jbush001 commented 7 years ago

Add floating point values represented by bit patterns 0x41000001 and 0xBF800004. The result should be 40E00001, but this implementation will return 40E00002. The shifted GRS (guard/round/sticky) bits are 100, which looks like it should round to even (because it's half way), but the normalizing shift that happens after should shift the guard bit into the LSB. This page describes in more detail: http://pages.cs.wisc.edu/~david/courses/cs552/S12/handouts/guardbits.pdf

jbush001 commented 6 years ago

https://stackoverflow.com/questions/44616253/round-ties-to-even-with-floating-point-subtraction

jbush001 commented 6 years ago

See also this paper, which describes the rounding technique used here: Beaumont-Smith, Andrew, et al. "Reduced latency IEEE floating-point standard adder architectures." Computer Arithmetic, 1999. Proceedings. 14th IEEE Symposium on. IEEE, 1999.

And this one, with more rigorous mathematical treatment: PARK, Woo-Chan, et al. "Floating point adder/subtractor performing ieee rounding and addition/subtraction in parallel." IEICE transactions on information and systems 79.4 (1996): 297-305.