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jdryg / tis100cpu

TIS-100 CPU in VHDL
MIT License
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Observe correct limits on register values: -999 to 999 #5

Open holmak opened 9 years ago

holmak commented 9 years ago

The -999 to 999 range doesn't make much sense for two's-complement arithmetic. One possible representation would be three digit signed binary-coded decimal values: 1 sign bit + 3 * 4 bits per digit = 13-bits for the -999 to 999 range. Unfortunately, this requires a BCD ALU and requires two more bits to store the value.

jdryg commented 9 years ago

The current implementation uses 16 bits for both the register file and the ALU operands. So there should be no problem with size.

The BCD ALU sounds right for this, but my only thought at the moment, is whether this will be easier/smaller to synthesize, and/or easier to understand, than (e.g.) explicit integer bounds checking.

I know I shouldn't worry about synthesis atm. Should try both ways and see what works best.