Closed JHertz5 closed 6 months ago
I have had a go at solving this in PR #1087. Any feedback is welcome.
Happy New Year @JHertz5 ,
Thanks for finding the issues in my documentation. It really helps to have someone else review it.
I agree with the changes and will merge it to master.
Regards,
--Jeremy
Happy New Year @JHertz5 ,
And to you too @jeremiah-c-leary!
Thanks for finding the issues in my documentation. It really helps to have someone else review it.
No problem at all, I know how hard it is to catch these kinds of things yourself. We're only human after all! I do really appreciate that there is such thorough documentation for this project, so I'm happy to contribute.
I agree with the changes and will merge it to master.
Excellent, thanks very much!
Environment State installed version of this project and your OS information.
Describe the bug The Configuring Multiline Indent Rules page displays examples to show the behaviour of each combination of the
align_left
andalign_paren
options. However, some of these examples are incorrect. Namely:align_left
set to no andalign_paren
set to no" is actually showing the example for "align_left
set to no andalign_paren
set to yes" (and therefore the two examples are the same).align_left
set to yes andalign_paren
set to yes" does not align against the parenthesis.align_left
set to no andalign_paren
set to yes" has a slight whitespace error meaning that the last line is not perfectly aligned with its parenthesis.As a side note, it is a bit confusing IMO to show the configuration with the rule
constant_012
and then to show examples that are not affected byconstant_012
, but rather byconcurrent_003
(assuming it's a concurrent assignment). While this is not an error, since the page does not state explicitly that the VHDL examples are generated by the configuration example, I would like to change it to avoid any potential confusion for readers.To Reproduce Steps to reproduce the behavior:
architecture rtl of test is
begin
wr_en <= resize(unsigned(I_FOO) + unsigned(I_BAR), q_foo'length);
wr_en <= resize(unsigned(I_FOO) + unsigned(I_BAR), q_foo'length);
end architecture rtl;
./bin/vsg -c ./test.yml -f ./test.vhd --fix
and compare test.vhd to the example on the webpage.Expected behavior The documentation should show the following for each configuration:
align_left: yes, align_paren: no (this does match the current documentation ✔️)
align_left: no, align_paren: no (this does not match the current documentation ❌)
align_left: yes, align_paren: yes (this does not match the current documentation ❌)
align_left: no, align_paren: yes (this does not match the current documentation ❌)